file
io_reg.h
Defines
- #define REG_BASE
- #define REG_OFFSET_DISPCNT
- #define REG_OFFSET_DISPSTAT
- #define REG_OFFSET_VCOUNT
- #define REG_OFFSET_BG0CNT
- #define REG_OFFSET_BG1CNT
- #define REG_OFFSET_BG2CNT
- #define REG_OFFSET_BG3CNT
- #define REG_OFFSET_BG0HOFS
- #define REG_OFFSET_BG0VOFS
- #define REG_OFFSET_BG1HOFS
- #define REG_OFFSET_BG1VOFS
- #define REG_OFFSET_BG2HOFS
- #define REG_OFFSET_BG2VOFS
- #define REG_OFFSET_BG3HOFS
- #define REG_OFFSET_BG3VOFS
- #define REG_OFFSET_BG2PA
- #define REG_OFFSET_BG2PB
- #define REG_OFFSET_BG2PC
- #define REG_OFFSET_BG2PD
- #define REG_OFFSET_BG2X
- #define REG_OFFSET_BG2X_L
- #define REG_OFFSET_BG2X_H
- #define REG_OFFSET_BG2Y
- #define REG_OFFSET_BG2Y_L
- #define REG_OFFSET_BG2Y_H
- #define REG_OFFSET_BG3PA
- #define REG_OFFSET_BG3PB
- #define REG_OFFSET_BG3PC
- #define REG_OFFSET_BG3PD
- #define REG_OFFSET_BG3X
- #define REG_OFFSET_BG3X_L
- #define REG_OFFSET_BG3X_H
- #define REG_OFFSET_BG3Y
- #define REG_OFFSET_BG3Y_L
- #define REG_OFFSET_BG3Y_H
- #define REG_OFFSET_WIN0H
- #define REG_OFFSET_WIN1H
- #define REG_OFFSET_WIN0V
- #define REG_OFFSET_WIN1V
- #define REG_OFFSET_WININ
- #define REG_OFFSET_WINOUT
- #define REG_OFFSET_MOSAIC
- #define REG_OFFSET_BLDCNT
- #define REG_OFFSET_BLDALPHA
- #define REG_OFFSET_BLDY
- #define REG_OFFSET_SOUND1CNT_L
- #define REG_OFFSET_NR10
- #define REG_OFFSET_SOUND1CNT_H
- #define REG_OFFSET_NR11
- #define REG_OFFSET_NR12
- #define REG_OFFSET_SOUND1CNT_X
- #define REG_OFFSET_NR13
- #define REG_OFFSET_NR14
- #define REG_OFFSET_SOUND2CNT_L
- #define REG_OFFSET_NR21
- #define REG_OFFSET_NR22
- #define REG_OFFSET_SOUND2CNT_H
- #define REG_OFFSET_NR23
- #define REG_OFFSET_NR24
- #define REG_OFFSET_SOUND3CNT_L
- #define REG_OFFSET_NR30
- #define REG_OFFSET_SOUND3CNT_H
- #define REG_OFFSET_NR31
- #define REG_OFFSET_NR32
- #define REG_OFFSET_SOUND3CNT_X
- #define REG_OFFSET_NR33
- #define REG_OFFSET_NR34
- #define REG_OFFSET_SOUND4CNT_L
- #define REG_OFFSET_NR41
- #define REG_OFFSET_NR42
- #define REG_OFFSET_SOUND4CNT_H
- #define REG_OFFSET_NR43
- #define REG_OFFSET_NR44
- #define REG_OFFSET_SOUNDCNT_L
- #define REG_OFFSET_NR50
- #define REG_OFFSET_NR51
- #define REG_OFFSET_SOUNDCNT_H
- #define REG_OFFSET_SOUNDCNT_X
- #define REG_OFFSET_NR52
- #define REG_OFFSET_SOUNDBIAS
- #define REG_OFFSET_SOUNDBIAS_L
- #define REG_OFFSET_SOUNDBIAS_H
- #define REG_OFFSET_WAVE_RAM0
- #define REG_OFFSET_WAVE_RAM1
- #define REG_OFFSET_WAVE_RAM2
- #define REG_OFFSET_WAVE_RAM3
- #define REG_OFFSET_FIFO_A
- #define REG_OFFSET_FIFO_B
- #define REG_OFFSET_DMA0
- #define REG_OFFSET_DMA0SAD
- #define REG_OFFSET_DMA0SAD_L
- #define REG_OFFSET_DMA0SAD_H
- #define REG_OFFSET_DMA0DAD
- #define REG_OFFSET_DMA0DAD_L
- #define REG_OFFSET_DMA0DAD_H
- #define REG_OFFSET_DMA0CNT
- #define REG_OFFSET_DMA0CNT_L
- #define REG_OFFSET_DMA0CNT_H
- #define REG_OFFSET_DMA1
- #define REG_OFFSET_DMA1SAD
- #define REG_OFFSET_DMA1SAD_L
- #define REG_OFFSET_DMA1SAD_H
- #define REG_OFFSET_DMA1DAD
- #define REG_OFFSET_DMA1DAD_L
- #define REG_OFFSET_DMA1DAD_H
- #define REG_OFFSET_DMA1CNT
- #define REG_OFFSET_DMA1CNT_L
- #define REG_OFFSET_DMA1CNT_H
- #define REG_OFFSET_DMA2
- #define REG_OFFSET_DMA2SAD
- #define REG_OFFSET_DMA2SAD_L
- #define REG_OFFSET_DMA2SAD_H
- #define REG_OFFSET_DMA2DAD
- #define REG_OFFSET_DMA2DAD_L
- #define REG_OFFSET_DMA2DAD_H
- #define REG_OFFSET_DMA2CNT
- #define REG_OFFSET_DMA2CNT_L
- #define REG_OFFSET_DMA2CNT_H
- #define REG_OFFSET_DMA3
- #define REG_OFFSET_DMA3SAD
- #define REG_OFFSET_DMA3SAD_L
- #define REG_OFFSET_DMA3SAD_H
- #define REG_OFFSET_DMA3DAD
- #define REG_OFFSET_DMA3DAD_L
- #define REG_OFFSET_DMA3DAD_H
- #define REG_OFFSET_DMA3CNT
- #define REG_OFFSET_DMA3CNT_L
- #define REG_OFFSET_DMA3CNT_H
- #define REG_OFFSET_TMCNT
- #define REG_OFFSET_TMCNT_L
- #define REG_OFFSET_TMCNT_H
- #define REG_OFFSET_TM0CNT
- #define REG_OFFSET_TM0CNT_L
- #define REG_OFFSET_TM0CNT_H
- #define REG_OFFSET_TM1CNT
- #define REG_OFFSET_TM1CNT_L
- #define REG_OFFSET_TM1CNT_H
- #define REG_OFFSET_TM2CNT
- #define REG_OFFSET_TM2CNT_L
- #define REG_OFFSET_TM2CNT_H
- #define REG_OFFSET_TM3CNT
- #define REG_OFFSET_TM3CNT_L
- #define REG_OFFSET_TM3CNT_H
- #define REG_OFFSET_SIOCNT
- #define REG_OFFSET_SIODATA8
- #define REG_OFFSET_SIODATA32
- #define REG_OFFSET_SIOMLT_SEND
- #define REG_OFFSET_SIOMLT_RECV
- #define REG_OFFSET_SIOMULTI0
- #define REG_OFFSET_SIOMULTI1
- #define REG_OFFSET_SIOMULTI2
- #define REG_OFFSET_SIOMULTI3
- #define REG_OFFSET_KEYINPUT
- #define REG_OFFSET_KEYCNT
- #define REG_OFFSET_RCNT
- #define REG_OFFSET_JOYCNT
- #define REG_OFFSET_JOYSTAT
- #define REG_OFFSET_JOY_RECV
- #define REG_OFFSET_JOY_RECV_L
- #define REG_OFFSET_JOY_RECV_H
- #define REG_OFFSET_JOY_TRANS
- #define REG_OFFSET_JOY_TRANS_L
- #define REG_OFFSET_JOY_TRANS_H
- #define REG_OFFSET_IME
- #define REG_OFFSET_IE
- #define REG_OFFSET_IF
- #define REG_OFFSET_WAITCNT
- #define REG_ADDR_DISPCNT
- #define REG_ADDR_DISPSTAT
- #define REG_ADDR_VCOUNT
- #define REG_ADDR_BG0CNT
- #define REG_ADDR_BG1CNT
- #define REG_ADDR_BG2CNT
- #define REG_ADDR_BG3CNT
- #define REG_ADDR_BG0HOFS
- #define REG_ADDR_BG0VOFS
- #define REG_ADDR_BG1HOFS
- #define REG_ADDR_BG1VOFS
- #define REG_ADDR_BG2HOFS
- #define REG_ADDR_BG2VOFS
- #define REG_ADDR_BG3HOFS
- #define REG_ADDR_BG3VOFS
- #define REG_ADDR_BG2PA
- #define REG_ADDR_BG2PB
- #define REG_ADDR_BG2PC
- #define REG_ADDR_BG2PD
- #define REG_ADDR_BG2X
- #define REG_ADDR_BG2X_L
- #define REG_ADDR_BG2X_H
- #define REG_ADDR_BG2Y
- #define REG_ADDR_BG2Y_L
- #define REG_ADDR_BG2Y_H
- #define REG_ADDR_BG3PA
- #define REG_ADDR_BG3PB
- #define REG_ADDR_BG3PC
- #define REG_ADDR_BG3PD
- #define REG_ADDR_BG3X
- #define REG_ADDR_BG3X_L
- #define REG_ADDR_BG3X_H
- #define REG_ADDR_BG3Y
- #define REG_ADDR_BG3Y_L
- #define REG_ADDR_BG3Y_H
- #define REG_ADDR_WIN0H
- #define REG_ADDR_WIN1H
- #define REG_ADDR_WIN0V
- #define REG_ADDR_WIN1V
- #define REG_ADDR_WININ
- #define REG_ADDR_WINOUT
- #define REG_ADDR_MOSAIC
- #define REG_ADDR_BLDCNT
- #define REG_ADDR_BLDALPHA
- #define REG_ADDR_BLDY
- #define REG_ADDR_SOUND1CNT_L
- #define REG_ADDR_NR10
- #define REG_ADDR_SOUND1CNT_H
- #define REG_ADDR_NR11
- #define REG_ADDR_NR12
- #define REG_ADDR_SOUND1CNT_X
- #define REG_ADDR_NR13
- #define REG_ADDR_NR14
- #define REG_ADDR_SOUND2CNT_L
- #define REG_ADDR_NR21
- #define REG_ADDR_NR22
- #define REG_ADDR_SOUND2CNT_H
- #define REG_ADDR_NR23
- #define REG_ADDR_NR24
- #define REG_ADDR_SOUND3CNT_L
- #define REG_ADDR_NR30
- #define REG_ADDR_SOUND3CNT_H
- #define REG_ADDR_NR31
- #define REG_ADDR_NR32
- #define REG_ADDR_SOUND3CNT_X
- #define REG_ADDR_NR33
- #define REG_ADDR_NR34
- #define REG_ADDR_SOUND4CNT_L
- #define REG_ADDR_NR41
- #define REG_ADDR_NR42
- #define REG_ADDR_SOUND4CNT_H
- #define REG_ADDR_NR43
- #define REG_ADDR_NR44
- #define REG_ADDR_SOUNDCNT_L
- #define REG_ADDR_NR50
- #define REG_ADDR_NR51
- #define REG_ADDR_SOUNDCNT_H
- #define REG_ADDR_SOUNDCNT_X
- #define REG_ADDR_NR52
- #define REG_ADDR_SOUNDBIAS
- #define REG_ADDR_SOUNDBIAS_L
- #define REG_ADDR_SOUNDBIAS_H
- #define REG_ADDR_WAVE_RAM0
- #define REG_ADDR_WAVE_RAM1
- #define REG_ADDR_WAVE_RAM2
- #define REG_ADDR_WAVE_RAM3
- #define REG_ADDR_FIFO_A
- #define REG_ADDR_FIFO_B
- #define REG_ADDR_DMA0
- #define REG_ADDR_DMA0SAD
- #define REG_ADDR_DMA0DAD
- #define REG_ADDR_DMA0CNT
- #define REG_ADDR_DMA0CNT_L
- #define REG_ADDR_DMA0CNT_H
- #define REG_ADDR_DMA1
- #define REG_ADDR_DMA1SAD
- #define REG_ADDR_DMA1DAD
- #define REG_ADDR_DMA1CNT
- #define REG_ADDR_DMA1CNT_L
- #define REG_ADDR_DMA1CNT_H
- #define REG_ADDR_DMA2
- #define REG_ADDR_DMA2SAD
- #define REG_ADDR_DMA2DAD
- #define REG_ADDR_DMA2CNT
- #define REG_ADDR_DMA2CNT_L
- #define REG_ADDR_DMA2CNT_H
- #define REG_ADDR_DMA3
- #define REG_ADDR_DMA3SAD
- #define REG_ADDR_DMA3DAD
- #define REG_ADDR_DMA3CNT
- #define REG_ADDR_DMA3CNT_L
- #define REG_ADDR_DMA3CNT_H
- #define REG_ADDR_TMCNT
- #define REG_ADDR_TMCNT_L
- #define REG_ADDR_TMCNT_H
- #define REG_ADDR_TM0CNT
- #define REG_ADDR_TM0CNT_L
- #define REG_ADDR_TM0CNT_H
- #define REG_ADDR_TM1CNT
- #define REG_ADDR_TM1CNT_L
- #define REG_ADDR_TM1CNT_H
- #define REG_ADDR_TM2CNT
- #define REG_ADDR_TM2CNT_L
- #define REG_ADDR_TM2CNT_H
- #define REG_ADDR_TM3CNT
- #define REG_ADDR_TM3CNT_L
- #define REG_ADDR_TM3CNT_H
- #define REG_ADDR_SIOCNT
- #define REG_ADDR_SIODATA8
- #define REG_ADDR_SIODATA32
- #define REG_ADDR_SIOMLT_SEND
- #define REG_ADDR_SIOMLT_RECV
- #define REG_ADDR_SIOMULTI0
- #define REG_ADDR_SIOMULTI1
- #define REG_ADDR_SIOMULTI2
- #define REG_ADDR_SIOMULTI3
- #define REG_ADDR_KEYINPUT
- #define REG_ADDR_KEYCNT
- #define REG_ADDR_RCNT
- #define REG_ADDR_JOYCNT
- #define REG_ADDR_JOYSTAT
- #define REG_ADDR_JOY_RECV
- #define REG_ADDR_JOY_RECV_L
- #define REG_ADDR_JOY_RECV_H
- #define REG_ADDR_JOY_TRANS
- #define REG_ADDR_JOY_TRANS_L
- #define REG_ADDR_JOY_TRANS_H
- #define REG_ADDR_IME
- #define REG_ADDR_IE
- #define REG_ADDR_IF
- #define REG_ADDR_WAITCNT
- #define REG_DISPCNT
- #define REG_DISPSTAT
- #define REG_VCOUNT
- #define REG_BG0CNT
- #define REG_BG1CNT
- #define REG_BG2CNT
- #define REG_BG3CNT
- #define REG_BG0HOFS
- #define REG_BG0VOFS
- #define REG_BG1HOFS
- #define REG_BG1VOFS
- #define REG_BG2HOFS
- #define REG_BG2VOFS
- #define REG_BG3HOFS
- #define REG_BG3VOFS
- #define REG_BG2PA
- #define REG_BG2PB
- #define REG_BG2PC
- #define REG_BG2PD
- #define REG_BG2X
- #define REG_BG2X_L
- #define REG_BG2X_H
- #define REG_BG2Y
- #define REG_BG2Y_L
- #define REG_BG2Y_H
- #define REG_BG3PA
- #define REG_BG3PB
- #define REG_BG3PC
- #define REG_BG3PD
- #define REG_BG3X
- #define REG_BG3X_L
- #define REG_BG3X_H
- #define REG_BG3Y
- #define REG_BG3Y_L
- #define REG_BG3Y_H
- #define REG_WIN0H
- #define REG_WIN1H
- #define REG_WIN0V
- #define REG_WIN1V
- #define REG_WININ
- #define REG_WINOUT
- #define REG_MOSAIC
- #define REG_BLDCNT
- #define REG_BLDALPHA
- #define REG_BLDY
- #define REG_SOUND1CNT_L
- #define REG_NR10
- #define REG_SOUND1CNT_H
- #define REG_NR11
- #define REG_NR12
- #define REG_SOUND1CNT_X
- #define REG_NR13
- #define REG_NR14
- #define REG_SOUND2CNT_L
- #define REG_NR21
- #define REG_NR22
- #define REG_SOUND2CNT_H
- #define REG_NR23
- #define REG_NR24
- #define REG_SOUND3CNT_L
- #define REG_NR30
- #define REG_SOUND3CNT_H
- #define REG_NR31
- #define REG_NR32
- #define REG_SOUND3CNT_X
- #define REG_NR33
- #define REG_NR34
- #define REG_SOUND4CNT_L
- #define REG_NR41
- #define REG_NR42
- #define REG_SOUND4CNT_H
- #define REG_NR43
- #define REG_NR44
- #define REG_SOUNDCNT_L
- #define REG_NR50
- #define REG_NR51
- #define REG_SOUNDCNT_H
- #define REG_SOUNDCNT_X
- #define REG_NR52
- #define REG_SOUNDBIAS
- #define REG_SOUNDBIAS_L
- #define REG_SOUNDBIAS_H
- #define REG_WAVE_RAM0
- #define REG_WAVE_RAM1
- #define REG_WAVE_RAM2
- #define REG_WAVE_RAM3
- #define REG_FIFO_A
- #define REG_FIFO_B
- #define REG_DMA0SAD
- #define REG_DMA0DAD
- #define REG_DMA0CNT
- #define REG_DMA0CNT_L
- #define REG_DMA0CNT_H
- #define REG_DMA1SAD
- #define REG_DMA1DAD
- #define REG_DMA1CNT
- #define REG_DMA1CNT_L
- #define REG_DMA1CNT_H
- #define REG_DMA2SAD
- #define REG_DMA2DAD
- #define REG_DMA2CNT
- #define REG_DMA2CNT_L
- #define REG_DMA2CNT_H
- #define REG_DMA3SAD
- #define REG_DMA3DAD
- #define REG_DMA3CNT
- #define REG_DMA3CNT_L
- #define REG_DMA3CNT_H
- #define REG_TMCNT(n)
- #define REG_TMCNT_L(n)
- #define REG_TMCNT_H(n)
- #define REG_TM0CNT
- #define REG_TM0CNT_L
- #define REG_TM0CNT_H
- #define REG_TM1CNT
- #define REG_TM1CNT_L
- #define REG_TM1CNT_H
- #define REG_TM2CNT
- #define REG_TM2CNT_L
- #define REG_TM2CNT_H
- #define REG_TM3CNT
- #define REG_TM3CNT_L
- #define REG_TM3CNT_H
- #define REG_SIOCNT
- #define REG_SIODATA8
- #define REG_SIODATA32
- #define REG_SIOMLT_SEND
- #define REG_SIOMLT_RECV
- #define REG_SIOMULTI0
- #define REG_SIOMULTI1
- #define REG_SIOMULTI2
- #define REG_SIOMULTI3
- #define REG_KEYINPUT
- #define REG_KEYCNT
- #define REG_RCNT
- #define REG_IME
- #define REG_IE
- #define REG_IF
- #define REG_WAITCNT
- #define DISPCNT_MODE_0
- #define DISPCNT_MODE_1
- #define DISPCNT_MODE_2
- #define DISPCNT_MODE_3
- #define DISPCNT_MODE_4
- #define DISPCNT_MODE_5
- #define DISPCNT_OBJ_1D_MAP
- #define DISPCNT_FORCED_BLANK
- #define DISPCNT_BG0_ON
- #define DISPCNT_BG1_ON
- #define DISPCNT_BG2_ON
- #define DISPCNT_BG3_ON
- #define DISPCNT_BG_ALL_ON
- #define DISPCNT_OBJ_ON
- #define DISPCNT_WIN0_ON
- #define DISPCNT_WIN1_ON
- #define DISPCNT_OBJWIN_ON
- #define DISPSTAT_VBLANK
- #define DISPSTAT_HBLANK
- #define DISPSTAT_VCOUNT
- #define DISPSTAT_VBLANK_INTR
- #define DISPSTAT_HBLANK_INTR
- #define DISPSTAT_VCOUNT_INTR
- #define BGCNT_PRIORITY(n)
- #define BGCNT_CHARBASE(n)
- #define BGCNT_MOSAIC
- #define BGCNT_16COLOR
- #define BGCNT_256COLOR
- #define BGCNT_SCREENBASE(n)
- #define BGCNT_WRAP
- #define BGCNT_TXT256x256
- #define BGCNT_TXT512x256
- #define BGCNT_TXT256x512
- #define BGCNT_TXT512x512
- #define BGCNT_AFF128x128
- #define BGCNT_AFF256x256
- #define BGCNT_AFF512x512
- #define BGCNT_AFF1024x1024
- #define WININ_WIN0_BG0
- #define WININ_WIN0_BG1
- #define WININ_WIN0_BG2
- #define WININ_WIN0_BG3
- #define WININ_WIN0_BG_ALL
- #define WININ_WIN0_OBJ
- #define WININ_WIN0_CLR
- #define WININ_WIN1_BG0
- #define WININ_WIN1_BG1
- #define WININ_WIN1_BG2
- #define WININ_WIN1_BG3
- #define WININ_WIN1_BG_ALL
- #define WININ_WIN1_OBJ
- #define WININ_WIN1_CLR
- #define WINOUT_WIN01_BG0
- #define WINOUT_WIN01_BG1
- #define WINOUT_WIN01_BG2
- #define WINOUT_WIN01_BG3
- #define WINOUT_WIN01_BG_ALL
- #define WINOUT_WIN01_OBJ
- #define WINOUT_WIN01_CLR
- #define WINOUT_WINOBJ_BG0
- #define WINOUT_WINOBJ_BG1
- #define WINOUT_WINOBJ_BG2
- #define WINOUT_WINOBJ_BG3
- #define WINOUT_WINOBJ_BG_ALL
- #define WINOUT_WINOBJ_OBJ
- #define WINOUT_WINOBJ_CLR
- #define WIN_RANGE(a, b)
- #define WIN_RANGE2(a, b)
- #define BLDCNT_TGT1_BG0
- #define BLDCNT_TGT1_BG1
- #define BLDCNT_TGT1_BG2
- #define BLDCNT_TGT1_BG3
- #define BLDCNT_TGT1_OBJ
- #define BLDCNT_TGT1_BD
- #define BLDCNT_EFFECT_NONE
- #define BLDCNT_EFFECT_BLEND
- #define BLDCNT_EFFECT_LIGHTEN
- #define BLDCNT_EFFECT_DARKEN
- #define BLDCNT_TGT2_BG0
- #define BLDCNT_TGT2_BG1
- #define BLDCNT_TGT2_BG2
- #define BLDCNT_TGT2_BG3
- #define BLDCNT_TGT2_OBJ
- #define BLDCNT_TGT2_BD
- #define BLDCNT_TGT2_ALL
- #define BLDALPHA_BLEND(target1, target2)
- #define BLDALPHA_BLEND2(target1, target2)
- #define SOUND_CGB_MIX_QUARTER
- #define SOUND_CGB_MIX_HALF
- #define SOUND_CGB_MIX_FULL
- #define SOUND_A_MIX_HALF
- #define SOUND_A_MIX_FULL
- #define SOUND_B_MIX_HALF
- #define SOUND_B_MIX_FULL
- #define SOUND_ALL_MIX_FULL
- #define SOUND_A_RIGHT_OUTPUT
- #define SOUND_A_LEFT_OUTPUT
- #define SOUND_A_TIMER_0
- #define SOUND_A_TIMER_1
- #define SOUND_A_FIFO_RESET
- #define SOUND_B_RIGHT_OUTPUT
- #define SOUND_B_LEFT_OUTPUT
- #define SOUND_B_TIMER_0
- #define SOUND_B_TIMER_1
- #define SOUND_B_FIFO_RESET
- #define SOUND_1_ON
- #define SOUND_2_ON
- #define SOUND_3_ON
- #define SOUND_4_ON
- #define SOUND_MASTER_ENABLE
- #define DMA_DEST_INC
- #define DMA_DEST_DEC
- #define DMA_DEST_FIXED
- #define DMA_DEST_RELOAD
- #define DMA_SRC_INC
- #define DMA_SRC_DEC
- #define DMA_SRC_FIXED
- #define DMA_REPEAT
- #define DMA_16BIT
- #define DMA_32BIT
- #define DMA_DREQ_ON
- #define DMA_START_NOW
- #define DMA_START_VBLANK
- #define DMA_START_HBLANK
- #define DMA_START_SPECIAL
- #define DMA_START_MASK
- #define DMA_INTR_ENABLE
- #define DMA_ENABLE
- #define TIMER_1CLK
- #define TIMER_64CLK
- #define TIMER_256CLK
- #define TIMER_1024CLK
- #define TIMER_INTR_ENABLE
- #define TIMER_ENABLE
- #define SIO_ID
- #define SIO_8BIT_MODE
- #define SIO_32BIT_MODE
- #define SIO_MULTI_MODE
- #define SIO_UART_MODE
- #define SIO_SCK_OUT
- #define SIO_SCK_IN
- #define SIO_IN_SCK_256K
- #define SIO_IN_SCK_2M
- #define SIO_ACK_RECV
- #define SIO_ACK_SEND
- #define SIO_9600_BPS
- #define SIO_38400_BPS
- #define SIO_57600_BPS
- #define SIO_115200_BPS
- #define SIO_MULTI_CONNECT
- #define SIO_MULTI_DISCONNECT
- #define SIO_MULTI_PARENT
- #define SIO_MULTI_CHILD
- #define SIO_MULTI_SI
- #define SIO_MULTI_SD
- #define SIO_MULTI_BUSY
- #define SIO_CTS_ENABLE
- #define SIO_UART_7BIT
- #define SIO_UART_8BIT
- #define SIO_ERROR
- #define SIO_START
- #define SIO_ENABLE
- #define SIO_PARITY_ENABLE
- #define SIO_PARITY_EVEN
- #define SIO_PARITY_ODD
- #define SIO_TRANS_ENABLE
- #define SIO_TRANS_DATA_FULL
- #define SIO_RECV_ENABLE
- #define SIO_RECV_DATA_EMPTY
- #define SIO_INTR_ENABLE
- #define SIO_MULTI_SI_SHIFT
- #define SIO_MULTI_SI_MASK
- #define SIO_MULTI_DI_SHIFT
- #define SIO_MULTI_DI_MASK
- #define A_BUTTON
- #define B_BUTTON
- #define SELECT_BUTTON
- #define START_BUTTON
- #define DPAD_RIGHT
- #define DPAD_LEFT
- #define DPAD_UP
- #define DPAD_DOWN
- #define R_BUTTON
- #define L_BUTTON
- #define KEYS_MASK
- #define KEY_INTR_ENABLE
- #define KEY_OR_INTR
- #define KEY_AND_INTR
- #define DPAD_ANY
- #define JOY_EXCL_DPAD
- #define INTR_FLAG_VBLANK
- #define INTR_FLAG_HBLANK
- #define INTR_FLAG_VCOUNT
- #define INTR_FLAG_TIMER0
- #define INTR_FLAG_TIMER1
- #define INTR_FLAG_TIMER2
- #define INTR_FLAG_TIMER3
- #define INTR_FLAG_SERIAL
- #define INTR_FLAG_DMA0
- #define INTR_FLAG_DMA1
- #define INTR_FLAG_DMA2
- #define INTR_FLAG_DMA3
- #define INTR_FLAG_KEYPAD
- #define INTR_FLAG_GAMEPAK
- #define WAITCNT_SRAM_4
- #define WAITCNT_SRAM_3
- #define WAITCNT_SRAM_2
- #define WAITCNT_SRAM_8
- #define WAITCNT_SRAM_MASK
- #define WAITCNT_WS0_N_4
- #define WAITCNT_WS0_N_3
- #define WAITCNT_WS0_N_2
- #define WAITCNT_WS0_N_8
- #define WAITCNT_WS0_N_MASK
- #define WAITCNT_WS0_S_2
- #define WAITCNT_WS0_S_1
- #define WAITCNT_WS1_N_4
- #define WAITCNT_WS1_N_3
- #define WAITCNT_WS1_N_2
- #define WAITCNT_WS1_N_8
- #define WAITCNT_WS1_N_MASK
- #define WAITCNT_WS1_S_4
- #define WAITCNT_WS1_S_1
- #define WAITCNT_WS2_N_4
- #define WAITCNT_WS2_N_3
- #define WAITCNT_WS2_N_2
- #define WAITCNT_WS2_N_8
- #define WAITCNT_WS2_N_MASK
- #define WAITCNT_WS2_S_8
- #define WAITCNT_WS2_S_1
- #define WAITCNT_PHI_OUT_NONE
- #define WAITCNT_PHI_OUT_4MHZ
- #define WAITCNT_PHI_OUT_8MHZ
- #define WAITCNT_PHI_OUT_16MHZ
- #define WAITCNT_PHI_OUT_MASK
- #define WAITCNT_PREFETCH_ENABLE
- #define WAITCNT_AGB
- #define WAITCNT_CGB