Twilight Princess
Decompilation of The Legend of Zelda: Twilight Princess
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pe_reg.h
Go to the documentation of this file.
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#ifndef PE_REG_H
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#define PE_REG_H
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#include <
revolution/private/GXFDLShortcut.h
>
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#define PE_REFRESH_RID_SIZE 8
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#define PE_REFRESH_RID_SHIFT 24
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#define PE_REFRESH_RID_MASK 0xff000000
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#define PE_REFRESH_GET_RID(pe_refresh) \
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((((unsigned long)(pe_refresh)) & PE_REFRESH_RID_MASK) >> PE_REFRESH_RID_SHIFT)
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#define PE_REFRESH_ENABLE_SIZE 1
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#define PE_REFRESH_ENABLE_SHIFT 9
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#define PE_REFRESH_ENABLE_MASK 0x00000200
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#define PE_REFRESH_GET_ENABLE(pe_refresh) \
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((((unsigned long)(pe_refresh)) & PE_REFRESH_ENABLE_MASK) >> PE_REFRESH_ENABLE_SHIFT)
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#define PE_REFRESH_INTERVAL_SIZE 9
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#define PE_REFRESH_INTERVAL_SHIFT 0
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#define PE_REFRESH_INTERVAL_MASK 0x000001ff
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#define PE_REFRESH_GET_INTERVAL(pe_refresh) \
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((((unsigned long)(pe_refresh)) & PE_REFRESH_INTERVAL_MASK) >> PE_REFRESH_INTERVAL_SHIFT)
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#define PE_REFRESH_TOTAL_SIZE 32
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#define PE_REFRESH(interval, enable, rid) \
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((((unsigned long)(interval)) << PE_REFRESH_INTERVAL_SHIFT) | \
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(((unsigned long)(enable)) << PE_REFRESH_ENABLE_SHIFT) | \
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(((unsigned long)(rid)) << PE_REFRESH_RID_SHIFT))
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#define PE_CHICKEN_PIWR_SIZE 1
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#define PE_CHICKEN_PIWR_SHIFT 0
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#define PE_CHICKEN_PIWR_MASK 0x00000001
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#define PE_CHICKEN_GET_PIWR(pe_chicken) \
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((((unsigned long)(pe_chicken)) & PE_CHICKEN_PIWR_MASK) >> PE_CHICKEN_PIWR_SHIFT)
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#define PE_CHICKEN_TXCPY_FMT_SIZE 1
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#define PE_CHICKEN_TXCPY_FMT_SHIFT 1
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#define PE_CHICKEN_TXCPY_FMT_MASK 0x00000002
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#define PE_CHICKEN_GET_TXCPY_FMT(pe_chicken) \
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((((unsigned long)(pe_chicken)) & PE_CHICKEN_TXCPY_FMT_MASK) >> PE_CHICKEN_TXCPY_FMT_SHIFT)
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#define PE_CHICKEN_TXCPY_CCV_SIZE 1
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#define PE_CHICKEN_TXCPY_CCV_SHIFT 2
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#define PE_CHICKEN_TXCPY_CCV_MASK 0x00000004
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#define PE_CHICKEN_GET_TXCPY_CCV(pe_chicken) \
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((((unsigned long)(pe_chicken)) & PE_CHICKEN_TXCPY_CCV_MASK) >> PE_CHICKEN_TXCPY_CCV_SHIFT)
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#define PE_CHICKEN_BLENDOP_SIZE 1
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#define PE_CHICKEN_BLENDOP_SHIFT 3
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#define PE_CHICKEN_BLENDOP_MASK 0x00000008
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#define PE_CHICKEN_GET_BLENDOP(pe_chicken) \
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((((unsigned long)(pe_chicken)) & PE_CHICKEN_BLENDOP_MASK) >> PE_CHICKEN_BLENDOP_SHIFT)
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#define PE_CHICKEN_RID_SIZE 8
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#define PE_CHICKEN_RID_SHIFT 24
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#define PE_CHICKEN_RID_MASK 0xff000000
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#define PE_CHICKEN_GET_RID(pe_chicken) \
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((((unsigned long)(pe_chicken)) & PE_CHICKEN_RID_MASK) >> PE_CHICKEN_RID_SHIFT)
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#define PE_CMODE0_RID_SIZE 8
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#define PE_CMODE0_RID_SHIFT 24
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#define PE_CMODE0_RID_MASK 0xff000000
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#define PE_CMODE0_GET_RID(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_RID_MASK) >> PE_CMODE0_RID_SHIFT)
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#define PE_CMODE1_RID_SIZE 8
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#define PE_CMODE1_RID_SHIFT 24
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#define PE_CMODE1_RID_MASK 0xff000000
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#define PE_CMODE1_GET_RID(pe_cmode1) \
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((((unsigned long)(pe_cmode1)) & PE_CMODE1_RID_MASK) >> PE_CMODE1_RID_SHIFT)
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#define PE_ZMODE_RID_SIZE 8
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#define PE_ZMODE_RID_SHIFT 24
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#define PE_ZMODE_RID_MASK 0xff000000
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#define PE_ZMODE_GET_RID(pe_zmode) \
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((((unsigned long)(pe_zmode)) & PE_ZMODE_RID_MASK) >> PE_ZMODE_RID_SHIFT)
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#define PE_CONTROL_RID_SIZE 8
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#define PE_CONTROL_RID_SHIFT 24
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#define PE_CONTROL_RID_MASK 0xff000000
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#define PE_CONTROL_GET_RID(pe_control) \
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((((unsigned long)(pe_control)) & PE_CONTROL_RID_MASK) >> PE_CONTROL_RID_SHIFT)
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#define PE_COPY_CMD_GAMMA_SIZE 2
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#define PE_COPY_CMD_GAMMA_SHIFT 7
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#define PE_COPY_CMD_GAMMA_MASK 0x00000180
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#define PE_COPY_CMD_GET_GAMMA(pe_copy_cmd) \
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((((unsigned long)(pe_copy_cmd)) & PE_COPY_CMD_GAMMA_MASK) >> PE_COPY_CMD_GAMMA_SHIFT)
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#define PE_TOKEN_TOKEN_SIZE 16
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#define PE_TOKEN_TOKEN_SHIFT 0
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#define PE_TOKEN_TOKEN_MASK 0x0000ffff
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#define PE_TOKEN_GET_TOKEN(pe_token) \
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((((unsigned long)(pe_token)) & PE_TOKEN_TOKEN_MASK) >> PE_TOKEN_TOKEN_SHIFT)
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#define PE_TOKEN_SET_TOKEN(pe_token, token) { \
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FDL_ASSERT(!((token) & ~((1 << PE_TOKEN_TOKEN_SIZE)-1))); \
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pe_token = (((unsigned long)(pe_token)) & ~PE_TOKEN_TOKEN_MASK) | (((unsigned long)(token)) << PE_TOKEN_TOKEN_SHIFT);\
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}
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#define PE_TOKEN_RID_SIZE 8
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#define PE_TOKEN_RID_SHIFT 24
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#define PE_TOKEN_RID_MASK 0xff000000
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#define PE_TOKEN_GET_RID(pe_token) \
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((((unsigned long)(pe_token)) & PE_TOKEN_RID_MASK) >> PE_TOKEN_RID_SHIFT)
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#define PE_TOKEN_SET_RID(pe_token, rid) { \
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FDL_ASSERT(!((rid) & ~((1 << PE_TOKEN_RID_SIZE)-1))); \
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pe_token = (((unsigned long)(pe_token)) & ~PE_TOKEN_RID_MASK) | (((unsigned long)(rid)) << PE_TOKEN_RID_SHIFT);\
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}
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#define PE_TOKEN_INT_TOKEN_SIZE 16
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#define PE_TOKEN_INT_TOKEN_SHIFT 0
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#define PE_TOKEN_INT_TOKEN_MASK 0x0000ffff
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#define PE_TOKEN_INT_GET_TOKEN(pe_token_int) \
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((((unsigned long)(pe_token_int)) & PE_TOKEN_INT_TOKEN_MASK) >> PE_TOKEN_INT_TOKEN_SHIFT)
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#define PE_TOKEN_INT_SET_TOKEN(pe_token_int, token) { \
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FDL_ASSERT(!((token) & ~((1 << PE_TOKEN_INT_TOKEN_SIZE)-1))); \
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pe_token_int = (((unsigned long)(pe_token_int)) & ~PE_TOKEN_INT_TOKEN_MASK) | (((unsigned long)(token)) << PE_TOKEN_INT_TOKEN_SHIFT);\
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}
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#define PE_TOKEN_INT_RID_SIZE 8
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#define PE_TOKEN_INT_RID_SHIFT 24
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#define PE_TOKEN_INT_RID_MASK 0xff000000
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#define PE_TOKEN_INT_GET_RID(pe_token_int) \
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((((unsigned long)(pe_token_int)) & PE_TOKEN_INT_RID_MASK) >> PE_TOKEN_INT_RID_SHIFT)
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#define PE_TOKEN_INT_SET_RID(pe_token_int, rid) { \
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FDL_ASSERT(!((rid) & ~((1 << PE_TOKEN_INT_RID_SIZE)-1))); \
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pe_token_int = (((unsigned long)(pe_token_int)) & ~PE_TOKEN_INT_RID_MASK) | (((unsigned long)(rid)) << PE_TOKEN_INT_RID_SHIFT);\
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}
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#define PE_TOKEN_INT_TOTAL_SIZE 32
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#define PE_TOKEN_INT(token, rid) \
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((((unsigned long)(token)) << PE_TOKEN_INT_TOKEN_SHIFT) | \
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(((unsigned long)(rid)) << PE_TOKEN_INT_RID_SHIFT))
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#define PE_FINISH_DST_SIZE 2
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#define PE_FINISH_DST_SHIFT 0
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#define PE_FINISH_DST_MASK 0x00000003
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#define PE_FINISH_GET_DST(pe_finish) \
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((((unsigned long)(pe_finish)) & PE_FINISH_DST_MASK) >> PE_FINISH_DST_SHIFT)
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#define PE_FINISH_SET_DST(pe_finish, dst) { \
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FDL_ASSERT(!((dst) & ~((1 << PE_FINISH_DST_SIZE)-1))); \
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pe_finish = (((unsigned long)(pe_finish)) & ~PE_FINISH_DST_MASK) | (((unsigned long)(dst)) << PE_FINISH_DST_SHIFT);\
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}
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#define PE_FINISH_PAD0_SIZE 22
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#define PE_FINISH_PAD0_SHIFT 2
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#define PE_FINISH_PAD0_MASK 0x00fffffc
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#define PE_FINISH_GET_PAD0(pe_finish) \
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((((unsigned long)(pe_finish)) & PE_FINISH_PAD0_MASK) >> PE_FINISH_PAD0_SHIFT)
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#define PE_FINISH_SET_PAD0(pe_finish, pad0) { \
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FDL_ASSERT(!((pad0) & ~((1 << PE_FINISH_PAD0_SIZE)-1))); \
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pe_finish = (((unsigned long)(pe_finish)) & ~PE_FINISH_PAD0_MASK) | (((unsigned long)(pad0)) << PE_FINISH_PAD0_SHIFT);\
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}
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#define PE_FINISH_RID_SIZE 8
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#define PE_FINISH_RID_SHIFT 24
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#define PE_FINISH_RID_MASK 0xff000000
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#define PE_FINISH_GET_RID(pe_finish) \
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((((unsigned long)(pe_finish)) & PE_FINISH_RID_MASK) >> PE_FINISH_RID_SHIFT)
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#define PE_FINISH_SET_RID(pe_finish, rid) { \
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FDL_ASSERT(!((rid) & ~((1 << PE_FINISH_RID_SIZE)-1))); \
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pe_finish = (((unsigned long)(pe_finish)) & ~PE_FINISH_RID_MASK) | (((unsigned long)(rid)) << PE_FINISH_RID_SHIFT);\
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}
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#define PE_FINISH_TOTAL_SIZE 32
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#define PE_FINISH(dst, rid) \
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((((unsigned long)(dst)) << PE_FINISH_DST_SHIFT) | \
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(((unsigned long)(rid)) << PE_FINISH_RID_SHIFT))
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#define PE_PI_CTL_AFMT_SIZE 2
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#define PE_PI_CTL_AFMT_SHIFT 0
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#define PE_PI_CTL_AFMT_MASK 0x00000003
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#define PE_PI_CTL_GET_AFMT(pe_pi_ctl) \
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((((unsigned long)(pe_pi_ctl)) & PE_PI_CTL_AFMT_MASK) >> PE_PI_CTL_AFMT_SHIFT)
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#define PE_PI_CTL_SET_AFMT(pe_pi_ctl, afmt) { \
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FDL_ASSERT(!((afmt) & ~((1 << PE_PI_CTL_AFMT_SIZE)-1))); \
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pe_pi_ctl = (((unsigned long)(pe_pi_ctl)) & ~PE_PI_CTL_AFMT_MASK) | (((unsigned long)(afmt)) << PE_PI_CTL_AFMT_SHIFT);\
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}
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#define PE_PI_CTL_ZFMT_SIZE 1
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#define PE_PI_CTL_ZFMT_SHIFT 2
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#define PE_PI_CTL_ZFMT_MASK 0x00000004
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#define PE_PI_CTL_GET_ZFMT(pe_pi_ctl) \
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((((unsigned long)(pe_pi_ctl)) & PE_PI_CTL_ZFMT_MASK) >> PE_PI_CTL_ZFMT_SHIFT)
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#define PE_PI_CTL_SET_ZFMT(pe_pi_ctl, zfmt) { \
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FDL_ASSERT(!((zfmt) & ~((1 << PE_PI_CTL_ZFMT_SIZE)-1))); \
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pe_pi_ctl = (((unsigned long)(pe_pi_ctl)) & ~PE_PI_CTL_ZFMT_MASK) | (((unsigned long)(zfmt)) << PE_PI_CTL_ZFMT_SHIFT);\
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}
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#define PE_PI_CTL_PAD0_SIZE 21
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#define PE_PI_CTL_PAD0_SHIFT 3
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#define PE_PI_CTL_PAD0_MASK 0x00fffff8
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#define PE_PI_CTL_GET_PAD0(pe_pi_ctl) \
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((((unsigned long)(pe_pi_ctl)) & PE_PI_CTL_PAD0_MASK) >> PE_PI_CTL_PAD0_SHIFT)
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#define PE_PI_CTL_SET_PAD0(pe_pi_ctl, pad0) { \
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FDL_ASSERT(!((pad0) & ~((1 << PE_PI_CTL_PAD0_SIZE)-1))); \
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pe_pi_ctl = (((unsigned long)(pe_pi_ctl)) & ~PE_PI_CTL_PAD0_MASK) | (((unsigned long)(pad0)) << PE_PI_CTL_PAD0_SHIFT);\
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}
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#define PE_PI_CTL_RID_SIZE 8
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#define PE_PI_CTL_RID_SHIFT 24
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#define PE_PI_CTL_RID_MASK 0xff000000
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#define PE_PI_CTL_GET_RID(pe_pi_ctl) \
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((((unsigned long)(pe_pi_ctl)) & PE_PI_CTL_RID_MASK) >> PE_PI_CTL_RID_SHIFT)
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#define PE_PI_CTL_SET_RID(pe_pi_ctl, rid) { \
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FDL_ASSERT(!((rid) & ~((1 << PE_PI_CTL_RID_SIZE)-1))); \
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pe_pi_ctl = (((unsigned long)(pe_pi_ctl)) & ~PE_PI_CTL_RID_MASK) | (((unsigned long)(rid)) << PE_PI_CTL_RID_SHIFT);\
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}
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#define PE_PI_CTL_TOTAL_SIZE 32
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#define PE_PI_CTL(afmt, zfmt, rid) \
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((((unsigned long)(afmt)) << PE_PI_CTL_AFMT_SHIFT) | \
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(((unsigned long)(zfmt)) << PE_PI_CTL_ZFMT_SHIFT) | \
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(((unsigned long)(rid)) << PE_PI_CTL_RID_SHIFT))
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#define PE_CMODE0_BLEND_ENABLE_SIZE 1
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#define PE_CMODE0_BLEND_ENABLE_SHIFT 0
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#define PE_CMODE0_BLEND_ENABLE_MASK 0x00000001
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#define PE_CMODE0_GET_BLEND_ENABLE(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_BLEND_ENABLE_MASK) >> PE_CMODE0_BLEND_ENABLE_SHIFT)
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#define PE_CMODE0_SET_BLEND_ENABLE(pe_cmode0, blend_enable) { \
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FDL_ASSERT(!((blend_enable) & ~((1 << PE_CMODE0_BLEND_ENABLE_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_BLEND_ENABLE_MASK) | (((unsigned long)(blend_enable)) << PE_CMODE0_BLEND_ENABLE_SHIFT);\
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}
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#define PE_CMODE0_LOGICOP_ENABLE_SIZE 1
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#define PE_CMODE0_LOGICOP_ENABLE_SHIFT 1
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#define PE_CMODE0_LOGICOP_ENABLE_MASK 0x00000002
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#define PE_CMODE0_GET_LOGICOP_ENABLE(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_LOGICOP_ENABLE_MASK) >> PE_CMODE0_LOGICOP_ENABLE_SHIFT)
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#define PE_CMODE0_SET_LOGICOP_ENABLE(pe_cmode0, logicop_enable) { \
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FDL_ASSERT(!((logicop_enable) & ~((1 << PE_CMODE0_LOGICOP_ENABLE_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_LOGICOP_ENABLE_MASK) | (((unsigned long)(logicop_enable)) << PE_CMODE0_LOGICOP_ENABLE_SHIFT);\
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}
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#define PE_CMODE0_DITHER_ENABLE_SIZE 1
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#define PE_CMODE0_DITHER_ENABLE_SHIFT 2
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#define PE_CMODE0_DITHER_ENABLE_MASK 0x00000004
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#define PE_CMODE0_GET_DITHER_ENABLE(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_DITHER_ENABLE_MASK) >> PE_CMODE0_DITHER_ENABLE_SHIFT)
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#define PE_CMODE0_SET_DITHER_ENABLE(pe_cmode0, dither_enable) { \
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FDL_ASSERT(!((dither_enable) & ~((1 << PE_CMODE0_DITHER_ENABLE_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_DITHER_ENABLE_MASK) | (((unsigned long)(dither_enable)) << PE_CMODE0_DITHER_ENABLE_SHIFT);\
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}
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#define PE_CMODE0_COLOR_MASK_SIZE 1
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#define PE_CMODE0_COLOR_MASK_SHIFT 3
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#define PE_CMODE0_COLOR_MASK_MASK 0x00000008
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#define PE_CMODE0_GET_COLOR_MASK(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_COLOR_MASK_MASK) >> PE_CMODE0_COLOR_MASK_SHIFT)
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#define PE_CMODE0_SET_COLOR_MASK(pe_cmode0, color_mask) { \
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FDL_ASSERT(!((color_mask) & ~((1 << PE_CMODE0_COLOR_MASK_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_COLOR_MASK_MASK) | (((unsigned long)(color_mask)) << PE_CMODE0_COLOR_MASK_SHIFT);\
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}
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#define PE_CMODE0_ALPHA_MASK_SIZE 1
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#define PE_CMODE0_ALPHA_MASK_SHIFT 4
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#define PE_CMODE0_ALPHA_MASK_MASK 0x00000010
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#define PE_CMODE0_GET_ALPHA_MASK(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_ALPHA_MASK_MASK) >> PE_CMODE0_ALPHA_MASK_SHIFT)
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#define PE_CMODE0_SET_ALPHA_MASK(pe_cmode0, alpha_mask) { \
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FDL_ASSERT(!((alpha_mask) & ~((1 << PE_CMODE0_ALPHA_MASK_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_ALPHA_MASK_MASK) | (((unsigned long)(alpha_mask)) << PE_CMODE0_ALPHA_MASK_SHIFT);\
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}
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#define PE_CMODE0_DFACTOR_SIZE 3
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#define PE_CMODE0_DFACTOR_SHIFT 5
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#define PE_CMODE0_DFACTOR_MASK 0x000000e0
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#define PE_CMODE0_GET_DFACTOR(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_DFACTOR_MASK) >> PE_CMODE0_DFACTOR_SHIFT)
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#define PE_CMODE0_SET_DFACTOR(pe_cmode0, dfactor) { \
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FDL_ASSERT(!((dfactor) & ~((1 << PE_CMODE0_DFACTOR_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_DFACTOR_MASK) | (((unsigned long)(dfactor)) << PE_CMODE0_DFACTOR_SHIFT);\
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}
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#define PE_CMODE0_SFACTOR_SIZE 3
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#define PE_CMODE0_SFACTOR_SHIFT 8
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#define PE_CMODE0_SFACTOR_MASK 0x00000700
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#define PE_CMODE0_GET_SFACTOR(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_SFACTOR_MASK) >> PE_CMODE0_SFACTOR_SHIFT)
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#define PE_CMODE0_SET_SFACTOR(pe_cmode0, sfactor) { \
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FDL_ASSERT(!((sfactor) & ~((1 << PE_CMODE0_SFACTOR_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_SFACTOR_MASK) | (((unsigned long)(sfactor)) << PE_CMODE0_SFACTOR_SHIFT);\
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}
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#define PE_CMODE0_BLENDOP_SIZE 1
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#define PE_CMODE0_BLENDOP_SHIFT 11
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#define PE_CMODE0_BLENDOP_MASK 0x00000800
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#define PE_CMODE0_GET_BLENDOP(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_BLENDOP_MASK) >> PE_CMODE0_BLENDOP_SHIFT)
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#define PE_CMODE0_SET_BLENDOP(pe_cmode0, blendop) { \
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FDL_ASSERT(!((blendop) & ~((1 << PE_CMODE0_BLENDOP_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_BLENDOP_MASK) | (((unsigned long)(blendop)) << PE_CMODE0_BLENDOP_SHIFT);\
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}
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#define PE_CMODE0_LOGICOP_SIZE 4
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#define PE_CMODE0_LOGICOP_SHIFT 12
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#define PE_CMODE0_LOGICOP_MASK 0x0000f000
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#define PE_CMODE0_GET_LOGICOP(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_LOGICOP_MASK) >> PE_CMODE0_LOGICOP_SHIFT)
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#define PE_CMODE0_SET_LOGICOP(pe_cmode0, logicop) { \
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FDL_ASSERT(!((logicop) & ~((1 << PE_CMODE0_LOGICOP_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_LOGICOP_MASK) | (((unsigned long)(logicop)) << PE_CMODE0_LOGICOP_SHIFT);\
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}
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#define PE_CMODE0_PAD0_SIZE 8
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#define PE_CMODE0_PAD0_SHIFT 16
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#define PE_CMODE0_PAD0_MASK 0x00ff0000
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#define PE_CMODE0_GET_PAD0(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_PAD0_MASK) >> PE_CMODE0_PAD0_SHIFT)
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#define PE_CMODE0_SET_PAD0(pe_cmode0, pad0) { \
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FDL_ASSERT(!((pad0) & ~((1 << PE_CMODE0_PAD0_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_PAD0_MASK) | (((unsigned long)(pad0)) << PE_CMODE0_PAD0_SHIFT);\
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}
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#define PE_CMODE0_RID_SIZE 8
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#define PE_CMODE0_RID_SHIFT 24
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#define PE_CMODE0_RID_MASK 0xff000000
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#define PE_CMODE0_GET_RID(pe_cmode0) \
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((((unsigned long)(pe_cmode0)) & PE_CMODE0_RID_MASK) >> PE_CMODE0_RID_SHIFT)
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#define PE_CMODE0_SET_RID(pe_cmode0, rid) { \
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FDL_ASSERT(!((rid) & ~((1 << PE_CMODE0_RID_SIZE)-1))); \
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pe_cmode0 = (((unsigned long)(pe_cmode0)) & ~PE_CMODE0_RID_MASK) | (((unsigned long)(rid)) << PE_CMODE0_RID_SHIFT);\
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}
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#define PE_CMODE0_TOTAL_SIZE 32
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#define PE_CMODE0(blend_enable, logicop_enable, dither_enable, color_mask, alpha_mask, dfactor, sfactor, blendop, logicop, rid) \
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((((unsigned long)(blend_enable)) << PE_CMODE0_BLEND_ENABLE_SHIFT) | \
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(((unsigned long)(logicop_enable)) << PE_CMODE0_LOGICOP_ENABLE_SHIFT) | \
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(((unsigned long)(dither_enable)) << PE_CMODE0_DITHER_ENABLE_SHIFT) | \
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(((unsigned long)(color_mask)) << PE_CMODE0_COLOR_MASK_SHIFT) | \
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(((unsigned long)(alpha_mask)) << PE_CMODE0_ALPHA_MASK_SHIFT) | \
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(((unsigned long)(dfactor)) << PE_CMODE0_DFACTOR_SHIFT) | \
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(((unsigned long)(sfactor)) << PE_CMODE0_SFACTOR_SHIFT) | \
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(((unsigned long)(blendop)) << PE_CMODE0_BLENDOP_SHIFT) | \
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(((unsigned long)(logicop)) << PE_CMODE0_LOGICOP_SHIFT) | \
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(((unsigned long)(rid)) << PE_CMODE0_RID_SHIFT))
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#define PE_CMODE1_CONSTANT_ALPHA_SIZE 8
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#define PE_CMODE1_CONSTANT_ALPHA_SHIFT 0
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#define PE_CMODE1_CONSTANT_ALPHA_MASK 0x000000ff
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#define PE_CMODE1_GET_CONSTANT_ALPHA(pe_cmode1) \
324
((((unsigned long)(pe_cmode1)) & PE_CMODE1_CONSTANT_ALPHA_MASK) >> PE_CMODE1_CONSTANT_ALPHA_SHIFT)
325
#define PE_CMODE1_SET_CONSTANT_ALPHA(pe_cmode1, constant_alpha) { \
326
FDL_ASSERT(!((constant_alpha) & ~((1 << PE_CMODE1_CONSTANT_ALPHA_SIZE)-1))); \
327
pe_cmode1 = (((unsigned long)(pe_cmode1)) & ~PE_CMODE1_CONSTANT_ALPHA_MASK) | (((unsigned long)(constant_alpha)) << PE_CMODE1_CONSTANT_ALPHA_SHIFT);\
328
}
329
#define PE_CMODE1_CONSTANT_ALPHA_ENABLE_SIZE 1
330
#define PE_CMODE1_CONSTANT_ALPHA_ENABLE_SHIFT 8
331
#define PE_CMODE1_CONSTANT_ALPHA_ENABLE_MASK 0x00000100
332
#define PE_CMODE1_GET_CONSTANT_ALPHA_ENABLE(pe_cmode1) \
333
((((unsigned long)(pe_cmode1)) & PE_CMODE1_CONSTANT_ALPHA_ENABLE_MASK) >> PE_CMODE1_CONSTANT_ALPHA_ENABLE_SHIFT)
334
#define PE_CMODE1_SET_CONSTANT_ALPHA_ENABLE(pe_cmode1, constant_alpha_enable) { \
335
FDL_ASSERT(!((constant_alpha_enable) & ~((1 << PE_CMODE1_CONSTANT_ALPHA_ENABLE_SIZE)-1))); \
336
pe_cmode1 = (((unsigned long)(pe_cmode1)) & ~PE_CMODE1_CONSTANT_ALPHA_ENABLE_MASK) | (((unsigned long)(constant_alpha_enable)) << PE_CMODE1_CONSTANT_ALPHA_ENABLE_SHIFT);\
337
}
338
#define PE_CMODE1_YUV_SIZE 2
339
#define PE_CMODE1_YUV_SHIFT 9
340
#define PE_CMODE1_YUV_MASK 0x00000600
341
#define PE_CMODE1_GET_YUV(pe_cmode1) \
342
((((unsigned long)(pe_cmode1)) & PE_CMODE1_YUV_MASK) >> PE_CMODE1_YUV_SHIFT)
343
#define PE_CMODE1_SET_YUV(pe_cmode1, yuv) { \
344
FDL_ASSERT(!((yuv) & ~((1 << PE_CMODE1_YUV_SIZE)-1))); \
345
pe_cmode1 = (((unsigned long)(pe_cmode1)) & ~PE_CMODE1_YUV_MASK) | (((unsigned long)(yuv)) << PE_CMODE1_YUV_SHIFT);\
346
}
347
#define PE_CMODE1_PAD0_SIZE 13
348
#define PE_CMODE1_PAD0_SHIFT 11
349
#define PE_CMODE1_PAD0_MASK 0x00fff800
350
#define PE_CMODE1_GET_PAD0(pe_cmode1) \
351
((((unsigned long)(pe_cmode1)) & PE_CMODE1_PAD0_MASK) >> PE_CMODE1_PAD0_SHIFT)
352
#define PE_CMODE1_SET_PAD0(pe_cmode1, pad0) { \
353
FDL_ASSERT(!((pad0) & ~((1 << PE_CMODE1_PAD0_SIZE)-1))); \
354
pe_cmode1 = (((unsigned long)(pe_cmode1)) & ~PE_CMODE1_PAD0_MASK) | (((unsigned long)(pad0)) << PE_CMODE1_PAD0_SHIFT);\
355
}
356
#define PE_CMODE1_RID_SIZE 8
357
#define PE_CMODE1_RID_SHIFT 24
358
#define PE_CMODE1_RID_MASK 0xff000000
359
#define PE_CMODE1_GET_RID(pe_cmode1) \
360
((((unsigned long)(pe_cmode1)) & PE_CMODE1_RID_MASK) >> PE_CMODE1_RID_SHIFT)
361
#define PE_CMODE1_SET_RID(pe_cmode1, rid) { \
362
FDL_ASSERT(!((rid) & ~((1 << PE_CMODE1_RID_SIZE)-1))); \
363
pe_cmode1 = (((unsigned long)(pe_cmode1)) & ~PE_CMODE1_RID_MASK) | (((unsigned long)(rid)) << PE_CMODE1_RID_SHIFT);\
364
}
365
#define PE_CMODE1_TOTAL_SIZE 32
366
#define PE_CMODE1(constant_alpha, constant_alpha_enable, yuv, rid) \
367
((((unsigned long)(constant_alpha)) << PE_CMODE1_CONSTANT_ALPHA_SHIFT) | \
368
(((unsigned long)(constant_alpha_enable)) << PE_CMODE1_CONSTANT_ALPHA_ENABLE_SHIFT) | \
369
(((unsigned long)(yuv)) << PE_CMODE1_YUV_SHIFT) | \
370
(((unsigned long)(rid)) << PE_CMODE1_RID_SHIFT))
371
372
#define PE_ZMODE_ENABLE_SIZE 1
373
#define PE_ZMODE_ENABLE_SHIFT 0
374
#define PE_ZMODE_ENABLE_MASK 0x00000001
375
#define PE_ZMODE_GET_ENABLE(pe_zmode) \
376
((((unsigned long)(pe_zmode)) & PE_ZMODE_ENABLE_MASK) >> PE_ZMODE_ENABLE_SHIFT)
377
#define PE_ZMODE_SET_ENABLE(pe_zmode, enable) { \
378
FDL_ASSERT(!((enable) & ~((1 << PE_ZMODE_ENABLE_SIZE)-1))); \
379
pe_zmode = (((unsigned long)(pe_zmode)) & ~PE_ZMODE_ENABLE_MASK) | (((unsigned long)(enable)) << PE_ZMODE_ENABLE_SHIFT);\
380
}
381
#define PE_ZMODE_FUNC_SIZE 3
382
#define PE_ZMODE_FUNC_SHIFT 1
383
#define PE_ZMODE_FUNC_MASK 0x0000000e
384
#define PE_ZMODE_GET_FUNC(pe_zmode) \
385
((((unsigned long)(pe_zmode)) & PE_ZMODE_FUNC_MASK) >> PE_ZMODE_FUNC_SHIFT)
386
#define PE_ZMODE_SET_FUNC(pe_zmode, func) { \
387
FDL_ASSERT(!((func) & ~((1 << PE_ZMODE_FUNC_SIZE)-1))); \
388
pe_zmode = (((unsigned long)(pe_zmode)) & ~PE_ZMODE_FUNC_MASK) | (((unsigned long)(func)) << PE_ZMODE_FUNC_SHIFT);\
389
}
390
#define PE_ZMODE_MASK_SIZE 1
391
#define PE_ZMODE_MASK_SHIFT 4
392
#define PE_ZMODE_MASK_MASK 0x00000010
393
#define PE_ZMODE_GET_MASK(pe_zmode) \
394
((((unsigned long)(pe_zmode)) & PE_ZMODE_MASK_MASK) >> PE_ZMODE_MASK_SHIFT)
395
#define PE_ZMODE_SET_MASK(pe_zmode, mask) { \
396
FDL_ASSERT(!((mask) & ~((1 << PE_ZMODE_MASK_SIZE)-1))); \
397
pe_zmode = (((unsigned long)(pe_zmode)) & ~PE_ZMODE_MASK_MASK) | (((unsigned long)(mask)) << PE_ZMODE_MASK_SHIFT);\
398
}
399
#define PE_ZMODE_PAD0_SIZE 19
400
#define PE_ZMODE_PAD0_SHIFT 5
401
#define PE_ZMODE_PAD0_MASK 0x00ffffe0
402
#define PE_ZMODE_GET_PAD0(pe_zmode) \
403
((((unsigned long)(pe_zmode)) & PE_ZMODE_PAD0_MASK) >> PE_ZMODE_PAD0_SHIFT)
404
#define PE_ZMODE_SET_PAD0(pe_zmode, pad0) { \
405
FDL_ASSERT(!((pad0) & ~((1 << PE_ZMODE_PAD0_SIZE)-1))); \
406
pe_zmode = (((unsigned long)(pe_zmode)) & ~PE_ZMODE_PAD0_MASK) | (((unsigned long)(pad0)) << PE_ZMODE_PAD0_SHIFT);\
407
}
408
#define PE_ZMODE_RID_SIZE 8
409
#define PE_ZMODE_RID_SHIFT 24
410
#define PE_ZMODE_RID_MASK 0xff000000
411
#define PE_ZMODE_GET_RID(pe_zmode) \
412
((((unsigned long)(pe_zmode)) & PE_ZMODE_RID_MASK) >> PE_ZMODE_RID_SHIFT)
413
#define PE_ZMODE_SET_RID(pe_zmode, rid) { \
414
FDL_ASSERT(!((rid) & ~((1 << PE_ZMODE_RID_SIZE)-1))); \
415
pe_zmode = (((unsigned long)(pe_zmode)) & ~PE_ZMODE_RID_MASK) | (((unsigned long)(rid)) << PE_ZMODE_RID_SHIFT);\
416
}
417
#define PE_ZMODE_TOTAL_SIZE 32
418
#define PE_ZMODE(enable, func, mask, rid) \
419
((((unsigned long)(enable)) << PE_ZMODE_ENABLE_SHIFT) | \
420
(((unsigned long)(func)) << PE_ZMODE_FUNC_SHIFT) | \
421
(((unsigned long)(mask)) << PE_ZMODE_MASK_SHIFT) | \
422
(((unsigned long)(rid)) << PE_ZMODE_RID_SHIFT))
423
424
#define PE_PI_EFB_ADDR_PAD0_SIZE 2
425
#define PE_PI_EFB_ADDR_PAD0_SHIFT 0
426
#define PE_PI_EFB_ADDR_PAD0_MASK 0x00000003
427
#define PE_PI_EFB_ADDR_GET_PAD0(pe_pi_efb_addr) \
428
((((unsigned long)(pe_pi_efb_addr)) & PE_PI_EFB_ADDR_PAD0_MASK) >> PE_PI_EFB_ADDR_PAD0_SHIFT)
429
#define PE_PI_EFB_ADDR_SET_PAD0(pe_pi_efb_addr, pad0) { \
430
FDL_ASSERT(!((pad0) & ~((1 << PE_PI_EFB_ADDR_PAD0_SIZE)-1))); \
431
pe_pi_efb_addr = (((unsigned long)(pe_pi_efb_addr)) & ~PE_PI_EFB_ADDR_PAD0_MASK) | (((unsigned long)(pad0)) << PE_PI_EFB_ADDR_PAD0_SHIFT);\
432
}
433
#define PE_PI_EFB_ADDR_X_SIZE 10
434
#define PE_PI_EFB_ADDR_X_SHIFT 2
435
#define PE_PI_EFB_ADDR_X_MASK 0x00000ffc
436
#define PE_PI_EFB_ADDR_GET_X(pe_pi_efb_addr) \
437
((((unsigned long)(pe_pi_efb_addr)) & PE_PI_EFB_ADDR_X_MASK) >> PE_PI_EFB_ADDR_X_SHIFT)
438
#define PE_PI_EFB_ADDR_SET_X(pe_pi_efb_addr, x) { \
439
FDL_ASSERT(!((x) & ~((1 << PE_PI_EFB_ADDR_X_SIZE)-1))); \
440
pe_pi_efb_addr = (((unsigned long)(pe_pi_efb_addr)) & ~PE_PI_EFB_ADDR_X_MASK) | (((unsigned long)(x)) << PE_PI_EFB_ADDR_X_SHIFT);\
441
}
442
#define PE_PI_EFB_ADDR_Y_SIZE 10
443
#define PE_PI_EFB_ADDR_Y_SHIFT 12
444
#define PE_PI_EFB_ADDR_Y_MASK 0x003ff000
445
#define PE_PI_EFB_ADDR_GET_Y(pe_pi_efb_addr) \
446
((((unsigned long)(pe_pi_efb_addr)) & PE_PI_EFB_ADDR_Y_MASK) >> PE_PI_EFB_ADDR_Y_SHIFT)
447
#define PE_PI_EFB_ADDR_SET_Y(pe_pi_efb_addr, y) { \
448
FDL_ASSERT(!((y) & ~((1 << PE_PI_EFB_ADDR_Y_SIZE)-1))); \
449
pe_pi_efb_addr = (((unsigned long)(pe_pi_efb_addr)) & ~PE_PI_EFB_ADDR_Y_MASK) | (((unsigned long)(y)) << PE_PI_EFB_ADDR_Y_SHIFT);\
450
}
451
#define PE_PI_EFB_ADDR_TYPE_SIZE 2
452
#define PE_PI_EFB_ADDR_TYPE_SHIFT 22
453
#define PE_PI_EFB_ADDR_TYPE_MASK 0x00c00000
454
#define PE_PI_EFB_ADDR_GET_TYPE(pe_pi_efb_addr) \
455
((((unsigned long)(pe_pi_efb_addr)) & PE_PI_EFB_ADDR_TYPE_MASK) >> PE_PI_EFB_ADDR_TYPE_SHIFT)
456
#define PE_PI_EFB_ADDR_SET_TYPE(pe_pi_efb_addr, type) { \
457
FDL_ASSERT(!((type) & ~((1 << PE_PI_EFB_ADDR_TYPE_SIZE)-1))); \
458
pe_pi_efb_addr = (((unsigned long)(pe_pi_efb_addr)) & ~PE_PI_EFB_ADDR_TYPE_MASK) | (((unsigned long)(type)) << PE_PI_EFB_ADDR_TYPE_SHIFT);\
459
}
460
#define PE_PI_EFB_ADDR_TOTAL_SIZE 24
461
#define PE_PI_EFB_ADDR(x, y, type) \
462
((((unsigned long)(x)) << PE_PI_EFB_ADDR_X_SHIFT) | \
463
(((unsigned long)(y)) << PE_PI_EFB_ADDR_Y_SHIFT) | \
464
(((unsigned long)(type)) << PE_PI_EFB_ADDR_TYPE_SHIFT))
465
466
#define PE_INTRCTL_INT0EN_SIZE 1
467
#define PE_INTRCTL_INT0EN_SHIFT 0
468
#define PE_INTRCTL_INT0EN_MASK 0x00000001
469
#define PE_INTRCTL_GET_INT0EN(pe_intrctl) \
470
((((unsigned long)(pe_intrctl)) & PE_INTRCTL_INT0EN_MASK) >> PE_INTRCTL_INT0EN_SHIFT)
471
#define PE_INTRCTL_SET_INT0EN(pe_intrctl, int0en) { \
472
FDL_ASSERT(!((int0en) & ~((1 << PE_INTRCTL_INT0EN_SIZE)-1))); \
473
pe_intrctl = (((unsigned long)(pe_intrctl)) & ~PE_INTRCTL_INT0EN_MASK) | (((unsigned long)(int0en)) << PE_INTRCTL_INT0EN_SHIFT);\
474
}
475
#define PE_INTRCTL_INT1EN_SIZE 1
476
#define PE_INTRCTL_INT1EN_SHIFT 1
477
#define PE_INTRCTL_INT1EN_MASK 0x00000002
478
#define PE_INTRCTL_GET_INT1EN(pe_intrctl) \
479
((((unsigned long)(pe_intrctl)) & PE_INTRCTL_INT1EN_MASK) >> PE_INTRCTL_INT1EN_SHIFT)
480
#define PE_INTRCTL_SET_INT1EN(pe_intrctl, int1en) { \
481
FDL_ASSERT(!((int1en) & ~((1 << PE_INTRCTL_INT1EN_SIZE)-1))); \
482
pe_intrctl = (((unsigned long)(pe_intrctl)) & ~PE_INTRCTL_INT1EN_MASK) | (((unsigned long)(int1en)) << PE_INTRCTL_INT1EN_SHIFT);\
483
}
484
#define PE_INTRCTL_INT0CLR_SIZE 1
485
#define PE_INTRCTL_INT0CLR_SHIFT 2
486
#define PE_INTRCTL_INT0CLR_MASK 0x00000004
487
#define PE_INTRCTL_GET_INT0CLR(pe_intrctl) \
488
((((unsigned long)(pe_intrctl)) & PE_INTRCTL_INT0CLR_MASK) >> PE_INTRCTL_INT0CLR_SHIFT)
489
#define PE_INTRCTL_SET_INT0CLR(pe_intrctl, int0clr) { \
490
FDL_ASSERT(!((int0clr) & ~((1 << PE_INTRCTL_INT0CLR_SIZE)-1))); \
491
pe_intrctl = (((unsigned long)(pe_intrctl)) & ~PE_INTRCTL_INT0CLR_MASK) | (((unsigned long)(int0clr)) << PE_INTRCTL_INT0CLR_SHIFT);\
492
}
493
#define PE_INTRCTL_INT1CLR_SIZE 1
494
#define PE_INTRCTL_INT1CLR_SHIFT 3
495
#define PE_INTRCTL_INT1CLR_MASK 0x00000008
496
#define PE_INTRCTL_GET_INT1CLR(pe_intrctl) \
497
((((unsigned long)(pe_intrctl)) & PE_INTRCTL_INT1CLR_MASK) >> PE_INTRCTL_INT1CLR_SHIFT)
498
#define PE_INTRCTL_SET_INT1CLR(pe_intrctl, int1clr) { \
499
FDL_ASSERT(!((int1clr) & ~((1 << PE_INTRCTL_INT1CLR_SIZE)-1))); \
500
pe_intrctl = (((unsigned long)(pe_intrctl)) & ~PE_INTRCTL_INT1CLR_MASK) | (((unsigned long)(int1clr)) << PE_INTRCTL_INT1CLR_SHIFT);\
501
}
502
#define PE_INTRCTL_TOTAL_SIZE 4
503
#define PE_INTRCTL(int0en, int1en, int0clr, int1clr) \
504
((((unsigned long)(int0en)) << PE_INTRCTL_INT0EN_SHIFT) | \
505
(((unsigned long)(int1en)) << PE_INTRCTL_INT1EN_SHIFT) | \
506
(((unsigned long)(int0clr)) << PE_INTRCTL_INT0CLR_SHIFT) | \
507
(((unsigned long)(int1clr)) << PE_INTRCTL_INT1CLR_SHIFT))
508
509
#define SC_PE_ZMODE_SET_ENABLE(line, pe_zmode,enable) \
510
FAST_GPFLAGSET(line, pe_zmode,enable,PE_ZMODE_ENABLE)
511
512
#define SC_PE_ZMODE_SET_FUNC(line, pe_zmode,func) \
513
FAST_GPFLAGSET(line, pe_zmode,func,PE_ZMODE_FUNC)
514
515
#define SC_PE_ZMODE_SET_MASK(line, pe_zmode,mask) \
516
FAST_GPFLAGSET(line, pe_zmode,mask,PE_ZMODE_MASK)
517
518
#define SC_PE_ZMODE_SET_PAD0(line, pe_zmode,pad0) \
519
FAST_GPFLAGSET(line, pe_zmode,pad0,PE_ZMODE_PAD0)
520
521
#define SC_PE_ZMODE_SET_RID(line, pe_zmode,rid) \
522
FAST_GPFLAGSET(line, pe_zmode,rid,PE_ZMODE_RID)
523
524
#define SC_PE_CMODE0_SET_BLEND_ENABLE(line, pe_cmode0,blend_enable) \
525
FAST_GPFLAGSET(line, pe_cmode0,blend_enable,PE_CMODE0_BLEND_ENABLE)
526
527
#define SC_PE_CMODE0_SET_LOGICOP_ENABLE(line, pe_cmode0,logicop_enable) \
528
FAST_GPFLAGSET(line, pe_cmode0,logicop_enable,PE_CMODE0_LOGICOP_ENABLE)
529
530
#define SC_PE_CMODE0_SET_DITHER_ENABLE(line, pe_cmode0,dither_enable) \
531
FAST_GPFLAGSET(line, pe_cmode0,dither_enable,PE_CMODE0_DITHER_ENABLE)
532
533
#define SC_PE_CMODE0_SET_COLOR_MASK(line, pe_cmode0,color_mask) \
534
FAST_GPFLAGSET(line, pe_cmode0,color_mask,PE_CMODE0_COLOR_MASK)
535
536
#define SC_PE_CMODE0_SET_ALPHA_MASK(line, pe_cmode0,alpha_mask) \
537
FAST_GPFLAGSET(line, pe_cmode0,alpha_mask,PE_CMODE0_ALPHA_MASK)
538
539
#define SC_PE_CMODE0_SET_DFACTOR(line, pe_cmode0,dfactor) \
540
FAST_GPFLAGSET(line, pe_cmode0,dfactor,PE_CMODE0_DFACTOR)
541
542
#define SC_PE_CMODE0_SET_SFACTOR(line, pe_cmode0,sfactor) \
543
FAST_GPFLAGSET(line, pe_cmode0,sfactor,PE_CMODE0_SFACTOR)
544
545
#define SC_PE_CMODE0_SET_BLENDOP(line, pe_cmode0,blendop) \
546
FAST_GPFLAGSET(line, pe_cmode0,blendop,PE_CMODE0_BLENDOP)
547
548
#define SC_PE_CMODE0_SET_LOGICOP(line, pe_cmode0,logicop) \
549
FAST_GPFLAGSET(line, pe_cmode0,logicop,PE_CMODE0_LOGICOP)
550
551
#define SC_PE_CMODE0_SET_PAD0(line, pe_cmode0,pad0) \
552
FAST_GPFLAGSET(line, pe_cmode0,pad0,PE_CMODE0_PAD0)
553
554
#define SC_PE_CMODE0_SET_RID(line, pe_cmode0,rid) \
555
FAST_GPFLAGSET(line, pe_cmode0,rid,PE_CMODE0_RID)
556
557
#define SC_PE_CMODE1_SET_CONSTANT_ALPHA(line, pe_cmode1,constant_alpha) \
558
FAST_GPFLAGSET(line, pe_cmode1,constant_alpha,PE_CMODE1_CONSTANT_ALPHA)
559
560
#define SC_PE_CMODE1_SET_CONSTANT_ALPHA_ENABLE(line, pe_cmode1,constant_alpha_enable) \
561
FAST_GPFLAGSET(line, pe_cmode1,constant_alpha_enable,PE_CMODE1_CONSTANT_ALPHA_ENABLE)
562
563
#define SC_PE_CMODE1_SET_YUV(line, pe_cmode1,yuv) \
564
FAST_GPFLAGSET(line, pe_cmode1,yuv,PE_CMODE1_YUV)
565
566
#define SC_PE_CMODE1_SET_PAD0(line, pe_cmode1,pad0) \
567
FAST_GPFLAGSET(line, pe_cmode1,pad0,PE_CMODE1_PAD0)
568
569
#define SC_PE_CMODE1_SET_RID(line, pe_cmode1,rid) \
570
FAST_GPFLAGSET(line, pe_cmode1,rid,PE_CMODE1_RID)
571
572
#define SC_PE_CONTROL_SET_PIXTYPE(line, pe_control,pixtype) \
573
FAST_GPFLAGSET(line, pe_control,pixtype,PE_CONTROL_PIXTYPE)
574
575
#define SC_PE_CONTROL_SET_ZCMODE(line, pe_control,zcmode) \
576
FAST_GPFLAGSET(line, pe_control,zcmode,PE_CONTROL_ZCMODE)
577
578
#define SC_PE_CONTROL_SET_ZTOP(line, pe_control,ztop) \
579
FAST_GPFLAGSET(line, pe_control,ztop,PE_CONTROL_ZTOP)
580
581
#define SC_PE_CONTROL_SET_PAD0(line, pe_control,pad0) \
582
FAST_GPFLAGSET(line, pe_control,pad0,PE_CONTROL_PAD0)
583
584
#define SC_PE_CONTROL_SET_RID(line, pe_control,rid) \
585
FAST_GPFLAGSET(line, pe_control,rid,PE_CONTROL_RID)
586
587
#define SC_PE_FIELD_MASK_SET_EVEN(line, pe_field_mask,even) \
588
FAST_GPFLAGSET(line, pe_field_mask,even,PE_FIELD_MASK_EVEN)
589
590
#define SC_PE_FIELD_MASK_SET_ODD(line, pe_field_mask,odd) \
591
FAST_GPFLAGSET(line, pe_field_mask,odd,PE_FIELD_MASK_ODD)
592
593
#define SC_PE_FIELD_MASK_SET_PAD0(line, pe_field_mask,pad0) \
594
FAST_GPFLAGSET(line, pe_field_mask,pad0,PE_FIELD_MASK_PAD0)
595
596
#define SC_PE_FIELD_MASK_SET_RID(line, pe_field_mask,rid) \
597
FAST_GPFLAGSET(line, pe_field_mask,rid,PE_FIELD_MASK_RID)
598
599
#define SC_PE_FINISH_SET_DST(line, pe_finish,dst) \
600
FAST_GPFLAGSET(line, pe_finish,dst,PE_FINISH_DST)
601
602
#define SC_PE_FINISH_SET_PAD0(line, pe_finish,pad0) \
603
FAST_GPFLAGSET(line, pe_finish,pad0,PE_FINISH_PAD0)
604
605
#define SC_PE_FINISH_SET_RID(line, pe_finish,rid) \
606
FAST_GPFLAGSET(line, pe_finish,rid,PE_FINISH_RID)
607
608
#define SC_PE_REFRESH_SET_INTERVAL(line, pe_refresh,interval) \
609
FAST_GPFLAGSET(line, pe_refresh,interval,PE_REFRESH_INTERVAL)
610
611
#define SC_PE_REFRESH_SET_ENABLE(line, pe_refresh,enable) \
612
FAST_GPFLAGSET(line, pe_refresh,enable,PE_REFRESH_ENABLE)
613
614
#define SC_PE_REFRESH_SET_PAD0(line, pe_refresh,pad0) \
615
FAST_GPFLAGSET(line, pe_refresh,pad0,PE_REFRESH_PAD0)
616
617
#define SC_PE_REFRESH_SET_RID(line, pe_refresh,rid) \
618
FAST_GPFLAGSET(line, pe_refresh,rid,PE_REFRESH_RID)
619
620
#define SC_PE_TOKEN_SET_TOKEN(line, pe_token,token) \
621
FAST_GPFLAGSET(line, pe_token,token,PE_TOKEN_TOKEN)
622
623
#define SC_PE_TOKEN_SET_PAD0(line, pe_token,pad0) \
624
FAST_GPFLAGSET(line, pe_token,pad0,PE_TOKEN_PAD0)
625
626
#define SC_PE_TOKEN_SET_RID(line, pe_token,rid) \
627
FAST_GPFLAGSET(line, pe_token,rid,PE_TOKEN_RID)
628
629
#define SC_PE_TOKEN_INT_SET_TOKEN(line, pe_token_int,token) \
630
FAST_GPFLAGSET(line, pe_token_int,token,PE_TOKEN_INT_TOKEN)
631
632
#define SC_PE_TOKEN_INT_SET_PAD0(line, pe_token_int,pad0) \
633
FAST_GPFLAGSET(line, pe_token_int,pad0,PE_TOKEN_INT_PAD0)
634
635
#define SC_PE_TOKEN_INT_SET_RID(line, pe_token_int,rid) \
636
FAST_GPFLAGSET(line, pe_token_int,rid,PE_TOKEN_INT_RID)
637
638
#define SC_PE_COPY_SRC_ADDR_SET_X(line, pe_copy_src_addr,x) \
639
FAST_GPFLAGSET(line, pe_copy_src_addr,x,PE_COPY_SRC_ADDR_X)
640
641
#define SC_PE_COPY_SRC_ADDR_SET_Y(line, pe_copy_src_addr,y) \
642
FAST_GPFLAGSET(line, pe_copy_src_addr,y,PE_COPY_SRC_ADDR_Y)
643
644
#define SC_PE_COPY_SRC_ADDR_SET_PAD0(line, pe_copy_src_addr,pad0) \
645
FAST_GPFLAGSET(line, pe_copy_src_addr,pad0,PE_COPY_SRC_ADDR_PAD0)
646
647
#define SC_PE_COPY_SRC_ADDR_SET_RID(line, pe_copy_src_addr,rid) \
648
FAST_GPFLAGSET(line, pe_copy_src_addr,rid,PE_COPY_SRC_ADDR_RID)
649
650
#define SC_PE_COPY_SRC_SIZE_SET_X(line, pe_copy_src_size,x) \
651
FAST_GPFLAGSET(line, pe_copy_src_size,x,PE_COPY_SRC_SIZE_X)
652
653
#define SC_PE_COPY_SRC_SIZE_SET_Y(line, pe_copy_src_size,y) \
654
FAST_GPFLAGSET(line, pe_copy_src_size,y,PE_COPY_SRC_SIZE_Y)
655
656
#define SC_PE_COPY_SRC_SIZE_SET_PAD0(line, pe_copy_src_size,pad0) \
657
FAST_GPFLAGSET(line, pe_copy_src_size,pad0,PE_COPY_SRC_SIZE_PAD0)
658
659
#define SC_PE_COPY_SRC_SIZE_SET_RID(line, pe_copy_src_size,rid) \
660
FAST_GPFLAGSET(line, pe_copy_src_size,rid,PE_COPY_SRC_SIZE_RID)
661
662
#define SC_PE_COPY_DST_BASE_SET_BASE(line, pe_copy_dst_base,base) \
663
FAST_GPFLAGSET(line, pe_copy_dst_base,base,PE_COPY_DST_BASE_BASE)
664
665
#define SC_PE_COPY_DST_BASE_SET_PAD0(line, pe_copy_dst_base,pad0) \
666
FAST_GPFLAGSET(line, pe_copy_dst_base,pad0,PE_COPY_DST_BASE_PAD0)
667
668
#define SC_PE_COPY_DST_BASE_SET_RID(line, pe_copy_dst_base,rid) \
669
FAST_GPFLAGSET(line, pe_copy_dst_base,rid,PE_COPY_DST_BASE_RID)
670
671
#define SC_PE_COPY_DST_STRIDE_SET_STRIDE(line, pe_copy_dst_stride,stride) \
672
FAST_GPFLAGSET(line, pe_copy_dst_stride,stride,PE_COPY_DST_STRIDE_STRIDE)
673
674
#define SC_PE_COPY_DST_STRIDE_SET_PAD0(line, pe_copy_dst_stride,pad0) \
675
FAST_GPFLAGSET(line, pe_copy_dst_stride,pad0,PE_COPY_DST_STRIDE_PAD0)
676
677
#define SC_PE_COPY_DST_STRIDE_SET_RID(line, pe_copy_dst_stride,rid) \
678
FAST_GPFLAGSET(line, pe_copy_dst_stride,rid,PE_COPY_DST_STRIDE_RID)
679
680
#define SC_PE_COPY_SCALE_SET_SCALE(line, pe_copy_scale,scale) \
681
FAST_GPFLAGSET(line, pe_copy_scale,scale,PE_COPY_SCALE_SCALE)
682
683
#define SC_PE_COPY_SCALE_SET_PAD0(line, pe_copy_scale,pad0) \
684
FAST_GPFLAGSET(line, pe_copy_scale,pad0,PE_COPY_SCALE_PAD0)
685
686
#define SC_PE_COPY_SCALE_SET_RID(line, pe_copy_scale,rid) \
687
FAST_GPFLAGSET(line, pe_copy_scale,rid,PE_COPY_SCALE_RID)
688
689
#define SC_PE_COPY_CLEAR_COLOR_AR_SET_RED(line, pe_copy_clear_color_ar,red) \
690
FAST_GPFLAGSET(line, pe_copy_clear_color_ar,red,PE_COPY_CLEAR_COLOR_AR_RED)
691
692
#define SC_PE_COPY_CLEAR_COLOR_AR_SET_ALPHA(line, pe_copy_clear_color_ar,alpha) \
693
FAST_GPFLAGSET(line, pe_copy_clear_color_ar,alpha,PE_COPY_CLEAR_COLOR_AR_ALPHA)
694
695
#define SC_PE_COPY_CLEAR_COLOR_AR_SET_PAD0(line, pe_copy_clear_color_ar,pad0) \
696
FAST_GPFLAGSET(line, pe_copy_clear_color_ar,pad0,PE_COPY_CLEAR_COLOR_AR_PAD0)
697
698
#define SC_PE_COPY_CLEAR_COLOR_AR_SET_RID(line, pe_copy_clear_color_ar,rid) \
699
FAST_GPFLAGSET(line, pe_copy_clear_color_ar,rid,PE_COPY_CLEAR_COLOR_AR_RID)
700
701
#define SC_PE_COPY_CLEAR_COLOR_GB_SET_BLUE(line, pe_copy_clear_color_gb,blue) \
702
FAST_GPFLAGSET(line, pe_copy_clear_color_gb,blue,PE_COPY_CLEAR_COLOR_GB_BLUE)
703
704
#define SC_PE_COPY_CLEAR_COLOR_GB_SET_GREEN(line, pe_copy_clear_color_gb,green) \
705
FAST_GPFLAGSET(line, pe_copy_clear_color_gb,green,PE_COPY_CLEAR_COLOR_GB_GREEN)
706
707
#define SC_PE_COPY_CLEAR_COLOR_GB_SET_PAD0(line, pe_copy_clear_color_gb,pad0) \
708
FAST_GPFLAGSET(line, pe_copy_clear_color_gb,pad0,PE_COPY_CLEAR_COLOR_GB_PAD0)
709
710
#define SC_PE_COPY_CLEAR_COLOR_GB_SET_RID(line, pe_copy_clear_color_gb,rid) \
711
FAST_GPFLAGSET(line, pe_copy_clear_color_gb,rid,PE_COPY_CLEAR_COLOR_GB_RID)
712
713
#define SC_PE_COPY_CLEAR_Z_SET_DATA(line, pe_copy_clear_z,data) \
714
FAST_GPFLAGSET(line, pe_copy_clear_z,data,PE_COPY_CLEAR_Z_DATA)
715
716
#define SC_PE_COPY_CLEAR_Z_SET_RID(line, pe_copy_clear_z,rid) \
717
FAST_GPFLAGSET(line, pe_copy_clear_z,rid,PE_COPY_CLEAR_Z_RID)
718
719
#define SC_PE_COPY_CMD_SET_CLAMP_TOP(line, pe_copy_cmd,clamp_top) \
720
FAST_GPFLAGSET(line, pe_copy_cmd,clamp_top,PE_COPY_CMD_CLAMP_TOP)
721
722
#define SC_PE_COPY_CMD_SET_CLAMP_BOTTOM(line, pe_copy_cmd,clamp_bottom) \
723
FAST_GPFLAGSET(line, pe_copy_cmd,clamp_bottom,PE_COPY_CMD_CLAMP_BOTTOM)
724
725
#define SC_PE_COPY_CMD_SET_PAD0(line, pe_copy_cmd,pad0) \
726
FAST_GPFLAGSET(line, pe_copy_cmd,pad0,PE_COPY_CMD_PAD0)
727
728
#define SC_PE_COPY_CMD_SET_TEX_FORMATH(line, pe_copy_cmd,tex_formatH) \
729
FAST_GPFLAGSET(line, pe_copy_cmd,tex_formatH,PE_COPY_CMD_TEX_FORMATH)
730
731
#define SC_PE_COPY_CMD_SET_TEX_FORMAT(line, pe_copy_cmd,tex_format) \
732
FAST_GPFLAGSET(line, pe_copy_cmd,tex_format,PE_COPY_CMD_TEX_FORMAT)
733
734
#define SC_PE_COPY_CMD_SET_GAMMA(line, pe_copy_cmd,gamma) \
735
FAST_GPFLAGSET(line, pe_copy_cmd,gamma,PE_COPY_CMD_GAMMA)
736
737
#define SC_PE_COPY_CMD_SET_MIP_MAP_FILTER(line, pe_copy_cmd,mip_map_filter) \
738
FAST_GPFLAGSET(line, pe_copy_cmd,mip_map_filter,PE_COPY_CMD_MIP_MAP_FILTER)
739
740
#define SC_PE_COPY_CMD_SET_VERTICAL_SCALE(line, pe_copy_cmd,vertical_scale) \
741
FAST_GPFLAGSET(line, pe_copy_cmd,vertical_scale,PE_COPY_CMD_VERTICAL_SCALE)
742
743
#define SC_PE_COPY_CMD_SET_CLEAR(line, pe_copy_cmd,clear) \
744
FAST_GPFLAGSET(line, pe_copy_cmd,clear,PE_COPY_CMD_CLEAR)
745
746
#define SC_PE_COPY_CMD_SET_INTERLACED(line, pe_copy_cmd,interlaced) \
747
FAST_GPFLAGSET(line, pe_copy_cmd,interlaced,PE_COPY_CMD_INTERLACED)
748
749
#define SC_PE_COPY_CMD_SET_OPCODE(line, pe_copy_cmd,opcode) \
750
FAST_GPFLAGSET(line, pe_copy_cmd,opcode,PE_COPY_CMD_OPCODE)
751
752
#define SC_PE_COPY_CMD_SET_CCV(line, pe_copy_cmd,ccv) \
753
FAST_GPFLAGSET(line, pe_copy_cmd,ccv,PE_COPY_CMD_CCV)
754
755
#define SC_PE_COPY_CMD_SET_PAD1(line, pe_copy_cmd,pad1) \
756
FAST_GPFLAGSET(line, pe_copy_cmd,pad1,PE_COPY_CMD_PAD1)
757
758
#define SC_PE_COPY_CMD_SET_RID(line, pe_copy_cmd,rid) \
759
FAST_GPFLAGSET(line, pe_copy_cmd,rid,PE_COPY_CMD_RID)
760
761
#define SC_PE_COPY_VFILTER0_SET_COEFF0(line, pe_copy_vfilter0,coeff0) \
762
FAST_GPFLAGSET(line, pe_copy_vfilter0,coeff0,PE_COPY_VFILTER0_COEFF0)
763
764
#define SC_PE_COPY_VFILTER0_SET_COEFF1(line, pe_copy_vfilter0,coeff1) \
765
FAST_GPFLAGSET(line, pe_copy_vfilter0,coeff1,PE_COPY_VFILTER0_COEFF1)
766
767
#define SC_PE_COPY_VFILTER0_SET_COEFF2(line, pe_copy_vfilter0,coeff2) \
768
FAST_GPFLAGSET(line, pe_copy_vfilter0,coeff2,PE_COPY_VFILTER0_COEFF2)
769
770
#define SC_PE_COPY_VFILTER0_SET_COEFF3(line, pe_copy_vfilter0,coeff3) \
771
FAST_GPFLAGSET(line, pe_copy_vfilter0,coeff3,PE_COPY_VFILTER0_COEFF3)
772
773
#define SC_PE_COPY_VFILTER0_SET_RID(line, pe_copy_vfilter0,rid) \
774
FAST_GPFLAGSET(line, pe_copy_vfilter0,rid,PE_COPY_VFILTER0_RID)
775
776
#define SC_PE_COPY_VFILTER1_SET_COEFF4(line, pe_copy_vfilter1,coeff4) \
777
FAST_GPFLAGSET(line, pe_copy_vfilter1,coeff4,PE_COPY_VFILTER1_COEFF4)
778
779
#define SC_PE_COPY_VFILTER1_SET_COEFF5(line, pe_copy_vfilter1,coeff5) \
780
FAST_GPFLAGSET(line, pe_copy_vfilter1,coeff5,PE_COPY_VFILTER1_COEFF5)
781
782
#define SC_PE_COPY_VFILTER1_SET_COEFF6(line, pe_copy_vfilter1,coeff6) \
783
FAST_GPFLAGSET(line, pe_copy_vfilter1,coeff6,PE_COPY_VFILTER1_COEFF6)
784
785
#define SC_PE_COPY_VFILTER1_SET_PAD0(line, pe_copy_vfilter1,pad0) \
786
FAST_GPFLAGSET(line, pe_copy_vfilter1,pad0,PE_COPY_VFILTER1_PAD0)
787
788
#define SC_PE_COPY_VFILTER1_SET_RID(line, pe_copy_vfilter1,rid) \
789
FAST_GPFLAGSET(line, pe_copy_vfilter1,rid,PE_COPY_VFILTER1_RID)
790
791
#define SC_PE_XBOUND_SET_LEFT(line, pe_xbound,left) \
792
FAST_GPFLAGSET(line, pe_xbound,left,PE_XBOUND_LEFT)
793
794
#define SC_PE_XBOUND_SET_RIGHT(line, pe_xbound,right) \
795
FAST_GPFLAGSET(line, pe_xbound,right,PE_XBOUND_RIGHT)
796
797
#define SC_PE_XBOUND_SET_PAD0(line, pe_xbound,pad0) \
798
FAST_GPFLAGSET(line, pe_xbound,pad0,PE_XBOUND_PAD0)
799
800
#define SC_PE_XBOUND_SET_RID(line, pe_xbound,rid) \
801
FAST_GPFLAGSET(line, pe_xbound,rid,PE_XBOUND_RID)
802
803
#define SC_PE_YBOUND_SET_TOP(line, pe_ybound,top) \
804
FAST_GPFLAGSET(line, pe_ybound,top,PE_YBOUND_TOP)
805
806
#define SC_PE_YBOUND_SET_BOTTOM(line, pe_ybound,bottom) \
807
FAST_GPFLAGSET(line, pe_ybound,bottom,PE_YBOUND_BOTTOM)
808
809
#define SC_PE_YBOUND_SET_PAD0(line, pe_ybound,pad0) \
810
FAST_GPFLAGSET(line, pe_ybound,pad0,PE_YBOUND_PAD0)
811
812
#define SC_PE_YBOUND_SET_RID(line, pe_ybound,rid) \
813
FAST_GPFLAGSET(line, pe_ybound,rid,PE_YBOUND_RID)
814
815
#define SC_PE_PERFMODE_SET_CNTR0(line, pe_perfmode,cntr0) \
816
FAST_GPFLAGSET(line, pe_perfmode,cntr0,PE_PERFMODE_CNTR0)
817
818
#define SC_PE_PERFMODE_SET_CNTR1(line, pe_perfmode,cntr1) \
819
FAST_GPFLAGSET(line, pe_perfmode,cntr1,PE_PERFMODE_CNTR1)
820
821
#define SC_PE_PERFMODE_SET_CNTR2(line, pe_perfmode,cntr2) \
822
FAST_GPFLAGSET(line, pe_perfmode,cntr2,PE_PERFMODE_CNTR2)
823
824
#define SC_PE_PERFMODE_SET_CNTR3(line, pe_perfmode,cntr3) \
825
FAST_GPFLAGSET(line, pe_perfmode,cntr3,PE_PERFMODE_CNTR3)
826
827
#define SC_PE_PERFMODE_SET_CNTR4(line, pe_perfmode,cntr4) \
828
FAST_GPFLAGSET(line, pe_perfmode,cntr4,PE_PERFMODE_CNTR4)
829
830
#define SC_PE_PERFMODE_SET_CNTR5(line, pe_perfmode,cntr5) \
831
FAST_GPFLAGSET(line, pe_perfmode,cntr5,PE_PERFMODE_CNTR5)
832
833
#define SC_PE_PERFMODE_SET_PAD0(line, pe_perfmode,pad0) \
834
FAST_GPFLAGSET(line, pe_perfmode,pad0,PE_PERFMODE_PAD0)
835
836
#define SC_PE_PERFMODE_SET_RID(line, pe_perfmode,rid) \
837
FAST_GPFLAGSET(line, pe_perfmode,rid,PE_PERFMODE_RID)
838
839
#define SC_PE_CHICKEN_SET_PIWR(line, pe_chicken,piwr) \
840
FAST_GPFLAGSET(line, pe_chicken,piwr,PE_CHICKEN_PIWR)
841
842
#define SC_PE_CHICKEN_SET_TXCPY_FMT(line, pe_chicken,txcpy_fmt) \
843
FAST_GPFLAGSET(line, pe_chicken,txcpy_fmt,PE_CHICKEN_TXCPY_FMT)
844
845
#define SC_PE_CHICKEN_SET_TXCPY_CCV(line, pe_chicken,txcpy_ccv) \
846
FAST_GPFLAGSET(line, pe_chicken,txcpy_ccv,PE_CHICKEN_TXCPY_CCV)
847
848
#define SC_PE_CHICKEN_SET_BLENDOP(line, pe_chicken,blendop) \
849
FAST_GPFLAGSET(line, pe_chicken,blendop,PE_CHICKEN_BLENDOP)
850
851
#define SC_PE_CHICKEN_SET_PAD0(line, pe_chicken,pad0) \
852
FAST_GPFLAGSET(line, pe_chicken,pad0,PE_CHICKEN_PAD0)
853
854
#define SC_PE_CHICKEN_SET_RID(line, pe_chicken,rid) \
855
FAST_GPFLAGSET(line, pe_chicken,rid,PE_CHICKEN_RID)
856
857
#define SC_PE_QUAD_OFFSET_SET_X(line, pe_quad_offset,x) \
858
FAST_GPFLAGSET(line, pe_quad_offset,x,PE_QUAD_OFFSET_X)
859
860
#define SC_PE_QUAD_OFFSET_SET_Y(line, pe_quad_offset,y) \
861
FAST_GPFLAGSET(line, pe_quad_offset,y,PE_QUAD_OFFSET_Y)
862
863
#define SC_PE_QUAD_OFFSET_SET_PAD0(line, pe_quad_offset,pad0) \
864
FAST_GPFLAGSET(line, pe_quad_offset,pad0,PE_QUAD_OFFSET_PAD0)
865
866
#define SC_PE_QUAD_OFFSET_SET_RID(line, pe_quad_offset,rid) \
867
FAST_GPFLAGSET(line, pe_quad_offset,rid,PE_QUAD_OFFSET_RID)
868
869
#define SC_PE_COLOR_RGB8_SET_BLUE(line, pe_color_rgb8,blue) \
870
FAST_GPFLAGSET(line, pe_color_rgb8,blue,PE_COLOR_RGB8_BLUE)
871
872
#define SC_PE_COLOR_RGB8_SET_GREEN(line, pe_color_rgb8,green) \
873
FAST_GPFLAGSET(line, pe_color_rgb8,green,PE_COLOR_RGB8_GREEN)
874
875
#define SC_PE_COLOR_RGB8_SET_RED(line, pe_color_rgb8,red) \
876
FAST_GPFLAGSET(line, pe_color_rgb8,red,PE_COLOR_RGB8_RED)
877
878
#define SC_PE_COLOR_RGB8_SET_PAD0(line, pe_color_rgb8,pad0) \
879
FAST_GPFLAGSET(line, pe_color_rgb8,pad0,PE_COLOR_RGB8_PAD0)
880
881
#define SC_PE_COLOR_RGBA6_SET_ALPHA(line, pe_color_rgba6,alpha) \
882
FAST_GPFLAGSET(line, pe_color_rgba6,alpha,PE_COLOR_RGBA6_ALPHA)
883
884
#define SC_PE_COLOR_RGBA6_SET_BLUE(line, pe_color_rgba6,blue) \
885
FAST_GPFLAGSET(line, pe_color_rgba6,blue,PE_COLOR_RGBA6_BLUE)
886
887
#define SC_PE_COLOR_RGBA6_SET_GREEN(line, pe_color_rgba6,green) \
888
FAST_GPFLAGSET(line, pe_color_rgba6,green,PE_COLOR_RGBA6_GREEN)
889
890
#define SC_PE_COLOR_RGBA6_SET_RED(line, pe_color_rgba6,red) \
891
FAST_GPFLAGSET(line, pe_color_rgba6,red,PE_COLOR_RGBA6_RED)
892
893
#define SC_PE_COLOR_RGBA6_SET_PAD0(line, pe_color_rgba6,pad0) \
894
FAST_GPFLAGSET(line, pe_color_rgba6,pad0,PE_COLOR_RGBA6_PAD0)
895
896
#define SC_PE_COLOR_RGBAA_SET_BLUE(line, pe_color_rgbaa,blue) \
897
FAST_GPFLAGSET(line, pe_color_rgbaa,blue,PE_COLOR_RGBAA_BLUE)
898
899
#define SC_PE_COLOR_RGBAA_SET_GREEN(line, pe_color_rgbaa,green) \
900
FAST_GPFLAGSET(line, pe_color_rgbaa,green,PE_COLOR_RGBAA_GREEN)
901
902
#define SC_PE_COLOR_RGBAA_SET_RED(line, pe_color_rgbaa,red) \
903
FAST_GPFLAGSET(line, pe_color_rgbaa,red,PE_COLOR_RGBAA_RED)
904
905
#define SC_PE_TEX_COPY_I4_SET_I1(line, pe_tex_copy_i4,i1) \
906
FAST_GPFLAGSET(line, pe_tex_copy_i4,i1,PE_TEX_COPY_I4_I1)
907
908
#define SC_PE_TEX_COPY_I4_SET_I0(line, pe_tex_copy_i4,i0) \
909
FAST_GPFLAGSET(line, pe_tex_copy_i4,i0,PE_TEX_COPY_I4_I0)
910
911
#define SC_PE_TEX_COPY_IA4_SET_I(line, pe_tex_copy_ia4,i) \
912
FAST_GPFLAGSET(line, pe_tex_copy_ia4,i,PE_TEX_COPY_IA4_I)
913
914
#define SC_PE_TEX_COPY_IA4_SET_ALPHA(line, pe_tex_copy_ia4,alpha) \
915
FAST_GPFLAGSET(line, pe_tex_copy_ia4,alpha,PE_TEX_COPY_IA4_ALPHA)
916
917
#define SC_PE_TEX_COPY_IA8_SET_I(line, pe_tex_copy_ia8,i) \
918
FAST_GPFLAGSET(line, pe_tex_copy_ia8,i,PE_TEX_COPY_IA8_I)
919
920
#define SC_PE_TEX_COPY_IA8_SET_ALPHA(line, pe_tex_copy_ia8,alpha) \
921
FAST_GPFLAGSET(line, pe_tex_copy_ia8,alpha,PE_TEX_COPY_IA8_ALPHA)
922
923
#define SC_PE_TEX_COPY_R5G6B5_SET_BLUE(line, pe_tex_copy_r5g6b5,blue) \
924
FAST_GPFLAGSET(line, pe_tex_copy_r5g6b5,blue,PE_TEX_COPY_R5G6B5_BLUE)
925
926
#define SC_PE_TEX_COPY_R5G6B5_SET_GREEN(line, pe_tex_copy_r5g6b5,green) \
927
FAST_GPFLAGSET(line, pe_tex_copy_r5g6b5,green,PE_TEX_COPY_R5G6B5_GREEN)
928
929
#define SC_PE_TEX_COPY_R5G6B5_SET_RED(line, pe_tex_copy_r5g6b5,red) \
930
FAST_GPFLAGSET(line, pe_tex_copy_r5g6b5,red,PE_TEX_COPY_R5G6B5_RED)
931
932
#define SC_PE_TEX_COPY_RGB5_SET_BLUE(line, pe_tex_copy_rgb5,blue) \
933
FAST_GPFLAGSET(line, pe_tex_copy_rgb5,blue,PE_TEX_COPY_RGB5_BLUE)
934
935
#define SC_PE_TEX_COPY_RGB5_SET_GREEN(line, pe_tex_copy_rgb5,green) \
936
FAST_GPFLAGSET(line, pe_tex_copy_rgb5,green,PE_TEX_COPY_RGB5_GREEN)
937
938
#define SC_PE_TEX_COPY_RGB5_SET_RED(line, pe_tex_copy_rgb5,red) \
939
FAST_GPFLAGSET(line, pe_tex_copy_rgb5,red,PE_TEX_COPY_RGB5_RED)
940
941
#define SC_PE_TEX_COPY_RGB5_SET_FORMAT(line, pe_tex_copy_rgb5,format) \
942
FAST_GPFLAGSET(line, pe_tex_copy_rgb5,format,PE_TEX_COPY_RGB5_FORMAT)
943
944
#define SC_PE_TEX_COPY_RGB4A3_SET_BLUE(line, pe_tex_copy_rgb4a3,blue) \
945
FAST_GPFLAGSET(line, pe_tex_copy_rgb4a3,blue,PE_TEX_COPY_RGB4A3_BLUE)
946
947
#define SC_PE_TEX_COPY_RGB4A3_SET_GREEN(line, pe_tex_copy_rgb4a3,green) \
948
FAST_GPFLAGSET(line, pe_tex_copy_rgb4a3,green,PE_TEX_COPY_RGB4A3_GREEN)
949
950
#define SC_PE_TEX_COPY_RGB4A3_SET_RED(line, pe_tex_copy_rgb4a3,red) \
951
FAST_GPFLAGSET(line, pe_tex_copy_rgb4a3,red,PE_TEX_COPY_RGB4A3_RED)
952
953
#define SC_PE_TEX_COPY_RGB4A3_SET_ALPHA(line, pe_tex_copy_rgb4a3,alpha) \
954
FAST_GPFLAGSET(line, pe_tex_copy_rgb4a3,alpha,PE_TEX_COPY_RGB4A3_ALPHA)
955
956
#define SC_PE_TEX_COPY_RGB4A3_SET_FORMAT(line, pe_tex_copy_rgb4a3,format) \
957
FAST_GPFLAGSET(line, pe_tex_copy_rgb4a3,format,PE_TEX_COPY_RGB4A3_FORMAT)
958
959
#define SC_PE_TEX_COPY_RGBA8_SET_RED(line, pe_tex_copy_rgba8,red) \
960
FAST_GPFLAGSET(line, pe_tex_copy_rgba8,red,PE_TEX_COPY_RGBA8_RED)
961
962
#define SC_PE_TEX_COPY_RGBA8_SET_ALPHA(line, pe_tex_copy_rgba8,alpha) \
963
FAST_GPFLAGSET(line, pe_tex_copy_rgba8,alpha,PE_TEX_COPY_RGBA8_ALPHA)
964
965
#define SC_PE_TEX_COPY_RGBA8_SET_BLUE(line, pe_tex_copy_rgba8,blue) \
966
FAST_GPFLAGSET(line, pe_tex_copy_rgba8,blue,PE_TEX_COPY_RGBA8_BLUE)
967
968
#define SC_PE_TEX_COPY_RGBA8_SET_GREEN(line, pe_tex_copy_rgba8,green) \
969
FAST_GPFLAGSET(line, pe_tex_copy_rgba8,green,PE_TEX_COPY_RGBA8_GREEN)
970
971
#define SC_PE_MASK_SET_M0(line, pe_mask,m0) \
972
FAST_GPFLAGSET(line, pe_mask,m0,PE_MASK_M0)
973
974
#define SC_PE_MASK_SET_M1(line, pe_mask,m1) \
975
FAST_GPFLAGSET(line, pe_mask,m1,PE_MASK_M1)
976
977
#define SC_PE_MASK_SET_M2(line, pe_mask,m2) \
978
FAST_GPFLAGSET(line, pe_mask,m2,PE_MASK_M2)
979
980
#define SC_PE_MASK_SET_M3(line, pe_mask,m3) \
981
FAST_GPFLAGSET(line, pe_mask,m3,PE_MASK_M3)
982
983
#define SC_PE_MISC_SET_V0(line, pe_misc,v0) \
984
FAST_GPFLAGSET(line, pe_misc,v0,PE_MISC_V0)
985
986
#define SC_PE_MISC_SET_V1(line, pe_misc,v1) \
987
FAST_GPFLAGSET(line, pe_misc,v1,PE_MISC_V1)
988
989
#define SC_PE_MISC_SET_V2(line, pe_misc,v2) \
990
FAST_GPFLAGSET(line, pe_misc,v2,PE_MISC_V2)
991
992
#define SC_PE_MISC_SET_V3(line, pe_misc,v3) \
993
FAST_GPFLAGSET(line, pe_misc,v3,PE_MISC_V3)
994
995
#define SC_PE_MISC_SET_ST(line, pe_misc,st) \
996
FAST_GPFLAGSET(line, pe_misc,st,PE_MISC_ST)
997
998
#define SC_PE_MISC_SET_SB(line, pe_misc,sb) \
999
FAST_GPFLAGSET(line, pe_misc,sb,PE_MISC_SB)
1000
1001
#define SC_PE_MISC_SET_SL(line, pe_misc,sl) \
1002
FAST_GPFLAGSET(line, pe_misc,sl,PE_MISC_SL)
1003
1004
#define SC_PE_MISC_SET_SR(line, pe_misc,sr) \
1005
FAST_GPFLAGSET(line, pe_misc,sr,PE_MISC_SR)
1006
1007
#define SC_PE_MISC_SET_TT(line, pe_misc,tt) \
1008
FAST_GPFLAGSET(line, pe_misc,tt,PE_MISC_TT)
1009
1010
#define SC_PE_MISC_SET_TB(line, pe_misc,tb) \
1011
FAST_GPFLAGSET(line, pe_misc,tb,PE_MISC_TB)
1012
1013
#define SC_PE_MISC_SET_TL(line, pe_misc,tl) \
1014
FAST_GPFLAGSET(line, pe_misc,tl,PE_MISC_TL)
1015
1016
#define SC_PE_MISC_SET_TR(line, pe_misc,tr) \
1017
FAST_GPFLAGSET(line, pe_misc,tr,PE_MISC_TR)
1018
1019
#define SC_PE_MISC_SET_TM(line, pe_misc,tm) \
1020
FAST_GPFLAGSET(line, pe_misc,tm,PE_MISC_TM)
1021
1022
#define SC_PE_MISC_SET_TP(line, pe_misc,tp) \
1023
FAST_GPFLAGSET(line, pe_misc,tp,PE_MISC_TP)
1024
1025
#define SC_PE_MISC_SET_SV(line, pe_misc,sv) \
1026
FAST_GPFLAGSET(line, pe_misc,sv,PE_MISC_SV)
1027
1028
#define SC_PE_TAG_SET_CYCLE(line, pe_tag,cycle) \
1029
FAST_GPFLAGSET(line, pe_tag,cycle,PE_TAG_CYCLE)
1030
1031
#define SC_PE_TAG_SET_YEC(line, pe_tag,yec) \
1032
FAST_GPFLAGSET(line, pe_tag,yec,PE_TAG_YEC)
1033
1034
#define SC_PE_TAG_SET_YOC(line, pe_tag,yoc) \
1035
FAST_GPFLAGSET(line, pe_tag,yoc,PE_TAG_YOC)
1036
1037
#define SC_PE_TAG_SET_XOC(line, pe_tag,xoc) \
1038
FAST_GPFLAGSET(line, pe_tag,xoc,PE_TAG_XOC)
1039
1040
#define SC_PE_TAG_SET_CLR(line, pe_tag,clr) \
1041
FAST_GPFLAGSET(line, pe_tag,clr,PE_TAG_CLR)
1042
1043
#define SC_PE_CMD_SET_VALID(line, pe_cmd,valid) \
1044
FAST_GPFLAGSET(line, pe_cmd,valid,PE_CMD_VALID)
1045
1046
#define SC_PE_CMD_SET_OP(line, pe_cmd,op) \
1047
FAST_GPFLAGSET(line, pe_cmd,op,PE_CMD_OP)
1048
1049
#define SC_PE_CMD_SET_BANKA(line, pe_cmd,bankA) \
1050
FAST_GPFLAGSET(line, pe_cmd,bankA,PE_CMD_BANKA)
1051
1052
#define SC_PE_CMD_SET_BANKB(line, pe_cmd,bankB) \
1053
FAST_GPFLAGSET(line, pe_cmd,bankB,PE_CMD_BANKB)
1054
1055
#define SC_PE_INTRCTL_SET_INT0EN(line, pe_intrctl,int0en) \
1056
FAST_GPFLAGSET(line, pe_intrctl,int0en,PE_INTRCTL_INT0EN)
1057
1058
#define SC_PE_INTRCTL_SET_INT1EN(line, pe_intrctl,int1en) \
1059
FAST_GPFLAGSET(line, pe_intrctl,int1en,PE_INTRCTL_INT1EN)
1060
1061
#define SC_PE_INTRCTL_SET_INT0CLR(line, pe_intrctl,int0clr) \
1062
FAST_GPFLAGSET(line, pe_intrctl,int0clr,PE_INTRCTL_INT0CLR)
1063
1064
#define SC_PE_INTRCTL_SET_INT1CLR(line, pe_intrctl,int1clr) \
1065
FAST_GPFLAGSET(line, pe_intrctl,int1clr,PE_INTRCTL_INT1CLR)
1066
1067
#define SC_PE_PI_EFB_ADDR_SET_PAD0(line, pe_pi_efb_addr,pad0) \
1068
FAST_GPFLAGSET(line, pe_pi_efb_addr,pad0,PE_PI_EFB_ADDR_PAD0)
1069
1070
#define SC_PE_PI_EFB_ADDR_SET_X(line, pe_pi_efb_addr,x) \
1071
FAST_GPFLAGSET(line, pe_pi_efb_addr,x,PE_PI_EFB_ADDR_X)
1072
1073
#define SC_PE_PI_EFB_ADDR_SET_Y(line, pe_pi_efb_addr,y) \
1074
FAST_GPFLAGSET(line, pe_pi_efb_addr,y,PE_PI_EFB_ADDR_Y)
1075
1076
#define SC_PE_PI_EFB_ADDR_SET_TYPE(line, pe_pi_efb_addr,type) \
1077
FAST_GPFLAGSET(line, pe_pi_efb_addr,type,PE_PI_EFB_ADDR_TYPE)
1078
1079
#define SC_PE_PI_ZMODE_SET_ZEN(line, pe_pi_zmode,zen) \
1080
FAST_GPFLAGSET(line, pe_pi_zmode,zen,PE_PI_ZMODE_ZEN)
1081
1082
#define SC_PE_PI_ZMODE_SET_ZFUNC(line, pe_pi_zmode,zfunc) \
1083
FAST_GPFLAGSET(line, pe_pi_zmode,zfunc,PE_PI_ZMODE_ZFUNC)
1084
1085
#define SC_PE_PI_ZMODE_SET_MASK(line, pe_pi_zmode,mask) \
1086
FAST_GPFLAGSET(line, pe_pi_zmode,mask,PE_PI_ZMODE_MASK)
1087
1088
#define SC_PE_PI_ZMODE_SET_PAD0(line, pe_pi_zmode,pad0) \
1089
FAST_GPFLAGSET(line, pe_pi_zmode,pad0,PE_PI_ZMODE_PAD0)
1090
1091
#define SC_PE_PI_ZMODE_SET_RID(line, pe_pi_zmode,rid) \
1092
FAST_GPFLAGSET(line, pe_pi_zmode,rid,PE_PI_ZMODE_RID)
1093
1094
#define SC_PE_PI_CMODE0_SET_BEN(line, pe_pi_cmode0,ben) \
1095
FAST_GPFLAGSET(line, pe_pi_cmode0,ben,PE_PI_CMODE0_BEN)
1096
1097
#define SC_PE_PI_CMODE0_SET_LEN(line, pe_pi_cmode0,len) \
1098
FAST_GPFLAGSET(line, pe_pi_cmode0,len,PE_PI_CMODE0_LEN)
1099
1100
#define SC_PE_PI_CMODE0_SET_DEN(line, pe_pi_cmode0,den) \
1101
FAST_GPFLAGSET(line, pe_pi_cmode0,den,PE_PI_CMODE0_DEN)
1102
1103
#define SC_PE_PI_CMODE0_SET_CMSK(line, pe_pi_cmode0,cmsk) \
1104
FAST_GPFLAGSET(line, pe_pi_cmode0,cmsk,PE_PI_CMODE0_CMSK)
1105
1106
#define SC_PE_PI_CMODE0_SET_AMSK(line, pe_pi_cmode0,amsk) \
1107
FAST_GPFLAGSET(line, pe_pi_cmode0,amsk,PE_PI_CMODE0_AMSK)
1108
1109
#define SC_PE_PI_CMODE0_SET_DFACTOR(line, pe_pi_cmode0,dfactor) \
1110
FAST_GPFLAGSET(line, pe_pi_cmode0,dfactor,PE_PI_CMODE0_DFACTOR)
1111
1112
#define SC_PE_PI_CMODE0_SET_SFACTOR(line, pe_pi_cmode0,sfactor) \
1113
FAST_GPFLAGSET(line, pe_pi_cmode0,sfactor,PE_PI_CMODE0_SFACTOR)
1114
1115
#define SC_PE_PI_CMODE0_SET_LOGICOP(line, pe_pi_cmode0,logicop) \
1116
FAST_GPFLAGSET(line, pe_pi_cmode0,logicop,PE_PI_CMODE0_LOGICOP)
1117
1118
#define SC_PE_PI_CMODE0_SET_PAD0(line, pe_pi_cmode0,pad0) \
1119
FAST_GPFLAGSET(line, pe_pi_cmode0,pad0,PE_PI_CMODE0_PAD0)
1120
1121
#define SC_PE_PI_CMODE0_SET_RID(line, pe_pi_cmode0,rid) \
1122
FAST_GPFLAGSET(line, pe_pi_cmode0,rid,PE_PI_CMODE0_RID)
1123
1124
#define SC_PE_PI_CMODE1_SET_CONSTALPHA(line, pe_pi_cmode1,constAlpha) \
1125
FAST_GPFLAGSET(line, pe_pi_cmode1,constAlpha,PE_PI_CMODE1_CONSTALPHA)
1126
1127
#define SC_PE_PI_CMODE1_SET_EN(line, pe_pi_cmode1,en) \
1128
FAST_GPFLAGSET(line, pe_pi_cmode1,en,PE_PI_CMODE1_EN)
1129
1130
#define SC_PE_PI_CMODE1_SET_PAD0(line, pe_pi_cmode1,pad0) \
1131
FAST_GPFLAGSET(line, pe_pi_cmode1,pad0,PE_PI_CMODE1_PAD0)
1132
1133
#define SC_PE_PI_CMODE1_SET_RID(line, pe_pi_cmode1,rid) \
1134
FAST_GPFLAGSET(line, pe_pi_cmode1,rid,PE_PI_CMODE1_RID)
1135
1136
#define SC_PE_PI_ALPHA_THRESHOLD_SET_ALPHA_THRESHOLD(line, pe_pi_alpha_threshold,alpha_threshold) \
1137
FAST_GPFLAGSET(line, pe_pi_alpha_threshold,alpha_threshold,PE_PI_ALPHA_THRESHOLD_ALPHA_THRESHOLD)
1138
1139
#define SC_PE_PI_ALPHA_THRESHOLD_SET_AFUNCTION(line, pe_pi_alpha_threshold,afunction) \
1140
FAST_GPFLAGSET(line, pe_pi_alpha_threshold,afunction,PE_PI_ALPHA_THRESHOLD_AFUNCTION)
1141
1142
#define SC_PE_PI_ALPHA_THRESHOLD_SET_PAD0(line, pe_pi_alpha_threshold,pad0) \
1143
FAST_GPFLAGSET(line, pe_pi_alpha_threshold,pad0,PE_PI_ALPHA_THRESHOLD_PAD0)
1144
1145
#define SC_PE_PI_ALPHA_THRESHOLD_SET_RID(line, pe_pi_alpha_threshold,rid) \
1146
FAST_GPFLAGSET(line, pe_pi_alpha_threshold,rid,PE_PI_ALPHA_THRESHOLD_RID)
1147
1148
#define SC_PE_PI_CTL_SET_AFMT(line, pe_pi_ctl,afmt) \
1149
FAST_GPFLAGSET(line, pe_pi_ctl,afmt,PE_PI_CTL_AFMT)
1150
1151
#define SC_PE_PI_CTL_SET_ZFMT(line, pe_pi_ctl,zfmt) \
1152
FAST_GPFLAGSET(line, pe_pi_ctl,zfmt,PE_PI_CTL_ZFMT)
1153
1154
#define SC_PE_PI_CTL_SET_PAD0(line, pe_pi_ctl,pad0) \
1155
FAST_GPFLAGSET(line, pe_pi_ctl,pad0,PE_PI_CTL_PAD0)
1156
1157
#define SC_PE_PI_CTL_SET_RID(line, pe_pi_ctl,rid) \
1158
FAST_GPFLAGSET(line, pe_pi_ctl,rid,PE_PI_CTL_RID)
1159
1160
#endif
// PE_REG_H
GXFDLShortcut.h
include
revolution
private
pe_reg.h
Generated by
1.12.0
1.12.0